1CY74FCT16445T/2
H245T
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY74FCT16245T
CY74FCT162245T
CY74FCT162H245T
SCCS026B - July 1994 - Revised September 2001
16-Bit Transceivers
Features
Functional Description
• Ioff supports partial-power-down mode operation
• Edge-rate control circuitry for significantly improved
noise characteristics
• Typical output skew < 250 ps
• ESD > 2000V
• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages
These 16-bit transceivers are designed for use in bidirectional
synchronous communication between two buses, where high
speed and low power are required. With the exception of the
CY74FCT16245T, these devices can be operated either as
two independent octals or a single 16-bit transceiver. Direction
of data flow is controlled by (DIR), the Output Enable (OE)
transfers data when LOW and isolates the buses when HIGH.
This device is fully specified for partial-power-down
applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device
when it is powered down.
• Industrial temperature range of –40˚C to +85˚C
• VCC = 5V ± 10%
CY74FCT16245T Features:
The CY74FCT16245T is ideally suited for driving
high-capacitance loads and low-impedance backplanes.
• 64 mA sink current, 32 mA source current
• Typical VOLP (ground bounce)<1.0V at VCC = 5V,
TA = 25˚C
The CY74FCT162245T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for mini-
mal undershoot and reduced ground bounce. The
CY74FCT162245T is ideal for driving transmission lines.
CY74FCT162245T Features:
• Balanced output drivers: 24 mA
• Reduced system switching noise
• Typical VOLP (ground bounce) <0.6V at VCC = 5V,
The CY74FCT162H245T is a 24-mA balanced output part that
has bus hold on the data inputs. The device retains the input’s
last state whenever the input goes to high impedance. This
eliminates the need for pull-up/down resistors and prevents
floating inputs.
TA= 25˚C
CY74FCT162H245T Features:
• Bus hold on data inputs
• Eliminates the need for external pull-up or pull-down
resistors
Logic Block Diagrams CY74FCT16245T,CY74FCT162245T,
CY74FCT162H245T
Pin Configuration
SSOP/TSSOP
Top View
DIR
DIR
2
1
OE
OE
1
2
3
4
48
47
46
DIR
B
OE
1
2
1
1
1
1
A
1
1
1
1
2
A
A
1
1
1
2
B
A
2
GND
B
GND
A
45
44
43
42
41
B
B
B
B
1
1
2
2
1
5
6
7
8
9
1
1
3
4
1
3
A
A
2
1
1
2
2
2
B
A
4
1
V
CC
V
CC
1
2
2
16245T
162245T
B
A
5
1
1
5
6
1
1
A
3
A
3
162H245T
B
A
6
40
39
38
B
B
3
1
3
2
GND
GND
10
11
B
A
7
1
1
7
8
1
1
A
A
4
1
4
2
2
B
A
8
12
13
37
36
35
34
B
B
B
4
B
5
1
1
4
5
2
2
B
B
A
1
2
2
1
2
2
14
15
16
17
18
A
2
A
A
5
2
1
5
GND
GND
33
32
31
30
29
28
27
26
25
B
3
B
4
A
3
2
2
2
2
A
A
6
A
4
1
6
2
2
V
V
CC
CC
B
B
B
B
B
6
B
7
B
8
1
1
1
6
7
8
2
2
2
A
5
19
20
21
22
23
24
2
5
6
2
2
A
A
7
B
A
6
1
7
2
GND
B
GND
A
2
2
7
8
2
7
A
A
8
B
A
1
8
2
2
2
8
DIR
OE
2
FCT16245–3
FCT16245–1
FCT16245–2
Copyright © 2001, Texas Instruments Incorporated