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CY74FCT16244TTSSOP

更新时间： 2024-10-28 05:30:59
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德州仪器 - TI 驱动器
页数 文件大小 规格书
8页 67K
描述
16-Bit Buffers/Line Drivers

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CY74FCT16244TTSSOP 数据手册

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1CY74FCT16444T/2  
H244T  
Data sheet acquired from Cypress Semiconductor Corporation.  
Data sheet modified to remove devices not offered.  
CY74FCT16244T  
CY74FCT162244T  
CY74FCT162H244T  
SCCS028 - December 1987 - Revised March 2000  
16-Bit Buffers/Line Drivers  
Features  
Functional Description  
• FCT-E speed at 3.2 ns  
• Power-off disable outputs permits live insertion  
• Edge-rate control circuitry for significantly improved  
noise characteristics  
• Typical output skew < 250 ps  
• ESD > 2000V  
• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)  
packages  
• Industrial temperature range of –40˚C to +85˚C  
• VCC = 5V ± 10%  
These 16-bit buffers/line drivers are designed for use in  
memory driver, clock driver, or other bus interface applications,  
where high-speed and low power are required. With  
flow-through pinout and small shrink packaging board layout  
is simplified. The three-state controls are designed to allow  
4-bit, 8-bit or combined 16-bit operation. The outputs are de-  
signed with a power-off disable feature to allow for live  
insertion of boards.  
The CY74FCT16244T is ideally suited for driving  
high-capacitance loads and low-impedance backplanes.  
The CY74FCT162244T has 24-mA balanced output drivers  
with current limiting resistors in the outputs. This reduces the  
need for external terminating resistors and provides for mini-  
mal undershoot and reduced ground bounce. The  
CY74FCT162244T is ideal for driving transmission lines.  
CY74FCT16244T Features:  
• 64 mA sink current, 32 mA source current  
• Typical VOLP (ground bounce)  
<1.0V at VCC = 5V, TA = 25˚C  
CY74FCT162244T Features:  
The CY74FCT162H244T is a 24-mA balanced output part that  
has “bus hold” on the data inputs. The device retains the in-  
put’s last state whenever the input goes to high impedance.  
This eliminates the need for pull-up/down resistors and pre-  
vents floating inputs.  
• Balanced output drivers: 24 mA  
• Reduced system switching noise  
• Typical VOLP (ground bounce)  
<0.6V at VCC = 5V, TA= 25˚C  
CY74FCT162H244T Features:  
• Bus hold on data inputs  
• Eliminates the need for external pull-up or pull-down  
resistors  
Logic Block Diagrams CY74FCT16244T, CY74FCT162244T,  
CY74FCT162H244T  
Pin Configuration  
SSOP/TSSOP  
Top View  
OE  
OE  
3
1
1
2
3
4
48  
47  
46  
OE  
Y
OE  
1
2
1
1
A
1
1
1
A
A
3
1
1
1
1
1
Y
Y
3
1
1
1
1
1
Y
2
A
2
1
GND  
Y
GND  
A
45  
44  
43  
A
2
A
2
3
3
16244T  
162244T  
Y
2
Y
2
5
3
3
1
1
3
1
1
3
Y
4
A
4
6
162H244T  
V
CC  
V
CC  
42  
7
A
3
A
3
Y
3
Y
3
Y
A
1
2
2
1
2
2
41  
8
Y
2
A
2
9
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
A
4
A
4
1
3
Y
4
Y
4
GND  
GND  
1
3
10  
11  
Y
A
3
2
2
3
3
3
2
2
3
3
FCT16244–1  
FCT16244–2  
Y
4
A
4
12  
13  
Y
1
A
1
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Y
2
A
2
OE  
OE  
4
2
GND  
GND  
Y
A
3
3
3
3
3
A
A
1
2
1
4
4
4
Y
Y
4
1
2
2
2
1
Y
4
A
4
3
V
V
CC  
CC  
Y
A
1
30  
29  
28  
27  
26  
25  
A
2
4
1
4
4
A
2
2
Y
Y
2
2
4
4
Y
2
A
2
4
GND  
Y
GND  
A
A
3
A
2
2
3
Y
Y
3
3
4
4
3
4
3
Y
4
A
4
3
4
OE  
OE  
4
A
4
A
4
4
Y
Y
4
2
4
4
FCT16244–3  
FCT16244–4  
FCT16244–5  
Copyright © 2000, Texas Instruments Incorporated  
12345678

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