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CY74FCT16240TSSOP PDF预览

CY74FCT16240TSSOP

更新时间: 2024-10-28 05:30:59
品牌 Logo 应用领域
德州仪器 - TI 驱动器
页数 文件大小 规格书
11页 126K
描述
16-Bit Buffers/Line Drivers

CY74FCT16240TSSOP 数据手册

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1CY74FCT162240T  
Data sheet acquired from Cypress Semiconductor Corporation.  
Data sheet modified to remove devices not offered.  
CY74FCT16240T  
CY74FCT162240T  
SCCS027B - August 1994 - Revised September 2001  
16-Bit Buffers/Line Drivers  
Features  
Functional Description  
• Ioff supports partial-power-down mode operation  
• Edge-rate control circuitry for significantly improved  
noise characteristics  
• Typical output skew < 250 ps  
• ESD > 2000V  
• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)  
packages  
These 16-bit buffer/line drivers are used in memory driver,  
clock driver, or other bus interface applications, where high  
speed and low power are required. With flow-through pinout  
and small shrink packaging, board layout is simplified. The  
three-state controls are designed to allow 4-, 8-, or 16-bit  
operation.  
This device is fully specified for partial-power-down  
applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device  
when it is powered down.  
• Industrial temperature range of –40˚C to +85˚C  
VCC = 5V ± 10%  
CY74FCT16240T Features:  
The CY74FCT16240T is ideally suited for driving  
high-capacitance loads and low-impedance backplanes.  
• 64 mA sink current, 32 mA source current  
• Typical VOLP (ground bounce)  
<1.0V at VCC = 5V, TA = 25˚C  
The CY74FCT162240T has 24-mA balanced output drivers  
with current limiting resistors in the outputs. This reduces the  
need for external terminating resistors and provides for mini-  
mal undershoot and reduced ground bounce. The  
CY74FCT162240T is ideal for driving transmission lines.  
CY74FCT162240T Features:  
• Balanced output drivers: 24 mA  
• Reduced system switching noise  
• Typical VOLP (ground bounce)  
<0.6V at VCC = 5V, TA= 25˚C  
Logic Block Diagrams  
Pin Configuration  
SSOP/TSSOP  
Top View  
OE  
A
OE  
3
1
OE  
Y
1
2
3
4
48  
47  
46  
OE  
1
2
1
A
1
1
1
A
1
3
1
1
Y
1
Y
3
1
1
1
1
Y
2
A
2
1
1
GND  
Y
GND  
A
45  
44  
43  
A
A
3
3
2
1
1
2
Y
2
Y
2
3
3
1
3
5
6
1
3
Y
4
A
4
1
1
V
CC  
V
CC  
A
3
A
3
42  
41  
7
Y
3
Y
3
Y
A
1
2
2
1
2
2
8
Y
2
A
2
9
40  
39  
38  
A
4
A
4
3
1
Y
4
Y
4
3
1
GND  
GND  
10  
11  
Y
A
3
2
2
3
2
2
FCT16240–3  
FCT16240–1  
Y
4
A
4
12  
13  
37  
36  
35  
34  
Y
A
1
3
3
1
3
3
OE  
A
14  
15  
16  
17  
18  
OE  
A
Y
2
A
2
4
2
GND  
Y
GND  
A
33  
32  
31  
30  
29  
28  
27  
26  
25  
3
3
3
3
3
3
4
4
4
1
2
1
Y
1
Y
4
2
1
Y
4
A
4
V
CC  
V
CC  
A
2
A
2
2
2
Y
2
Y
4
4
2
2
2
Y
1
A
1
19  
20  
21  
22  
23  
24  
4
4
4
Y
2
A
2
4
A
3
A
GND  
Y
GND  
A
3
Y
3
Y
3
4
4
3
4
4
3
Y
4
A
4
A
4
A
4
2
4
Y
4
Y
4
2
4
OE  
OE  
3
4
FCT16240–2  
FCT16240–4  
FCT16240–5  
Copyright © 2001, Texas Instruments Incorporated  

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