Datasheet > 存储 > SRAM> CY62256NLL-55NXI

CY62256NLL-55NXI

更新时间： 2024-11-09 12:49:35

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
16页	450K
描述
256 K (32 K x 8) Static RAM

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中文翻译

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数据手册

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CY62256NLL-55NXI 数据手册

CY62256N

256 K (32 K × 8) Static RAM

256K (32K

× 8) Static RAM

Features

Functional Description

■ Temperature ranges

The CY62256N is a high performance CMOS static RAM

organized as 32K words by 8 bits. Easy memory expansion is

provided by an active LOW chip enable (CE) and active LOW

output enable (OE) and tristate drivers. This device has an

automatic power-down feature, reducing the power consumption

by 99.9 percent when deselected.

❐ Commercial: 0 °C to +70 °C

❐ Industrial: –40 °C to +85 °C

❐ Automotive-A: –40 °C to +85 °C

❐ Automotive-E: –40 °C to +125 °C

■ High speed: 55 ns

An active LOW write enable signal (WE) controls the

writing/reading operation of the memory. When CE and WE

inputs are both LOW, data on the eight data input/output pins

(I/O₀through I/O₇) is written into the memory location addressed

by the address present on the address pins (A₀through A₁₄).

Reading the device is accomplished by selecting the device and

enabling the outputs, CE and OE active LOW, while WE remains

inactive or HIGH. Under these conditions, the contents of the

location addressed by the information on address pins are

present on the eight data input/output pins.

■ Voltage range: 4.5 V to 5.5 V operation

■ Low active power

❐ 275 mW (max)

■ Low standby power (LL version)

❐ 82.5 μW (max)

■ Easy memory expansion with CE and OE Features

■ TTL-compatible inputs and outputs

The input/output pins remain in a high impedance state unless

the chip is selected, outputs are enabled, and write enable (WE)

is HIGH.

■ Automatic power-down when deselected

■ CMOS for optimum speed and power

■ Available in Pb-free and non Pb-free 28-pin (600-mil) PDIP,

28-pin (300-mil) narrow SOIC, 28-pin TSOP-I, and 28-pin

reverse TSOP-I packages

Logic Block Diagram

I/O

INPUTBUFFER

32K x 8

ARRAY

POWER

DOWN

COLUMN

DECODER

I/O

Cypress Semiconductor Corporation

Document Number: 001-06511 Rev. *F

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised November 9, 2011

12 3 4 5 6 7...16

中文翻译

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与CY62256NLL-55NXI相关器件

型号	品牌	获取价格	描述	数据表
CY62256NLL-55SNI	CYPRESS	获取价格	256K (32K x 8) Static RAM
CY62256NLL-55SNXE	CYPRESS	获取价格	256K (32K x 8) Static RAM
CY62256NLL-55SNXET	CYPRESS	获取价格	256K (32K x 8) Static RAM
CY62256NLL-55SNXI	CYPRESS	获取价格	256K (32K x 8) Static RAM
CY62256NLL-55SNXIT	CYPRESS	获取价格	256 K (32 K x 8) Static RAM
CY62256NLL-55ZI	CYPRESS	获取价格	256K (32K x 8) Static RAM
CY62256NLL-55ZI	ROCHESTER	获取价格	暂无描述
CY62256NLL-55ZRXE	CYPRESS	获取价格	256K (32K x 8) Static RAM
CY62256NLL-55ZXA	CYPRESS	获取价格	256K (32K x 8) Static RAM
CY62256NLL-55ZXAT	CYPRESS	获取价格	Standard SRAM, 32KX8, 55ns, CMOS, PDSO28, 8 X 13.40 MM, LEAD FREE, TSOP1-28