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CY62157EV30LL-45BVXIT PDF预览

CY62157EV30LL-45BVXIT

更新时间： 2024-11-27 13:02:59
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
14页 627K
描述
Standard SRAM, 512KX16, 45ns, CMOS, PBGA48, VFBGA-48

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CY62157EV30LL-45BVXIT 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active包装说明：VFBGA, BGA48,6X8,30
Reach Compliance Code：compliantECCN代码：3A991.B.2.A
HTS代码：8542.32.00.41风险等级：1.09
Is Samacsys：N最长访问时间：45 ns
I/O 类型：COMMONJESD-30 代码：R-PBGA-B48
JESD-609代码：e1长度：8 mm
内存密度：8388608 bit内存集成电路类型：STANDARD SRAM
内存宽度：16湿度敏感等级：3
功能数量：1端子数量：48
字数：524288 words字数代码：512000
工作模式：ASYNCHRONOUS最高工作温度：85 °C
最低工作温度：-40 °C组织：512KX16
输出特性：3-STATE封装主体材料：PLASTIC/EPOXY
封装代码：VFBGA封装等效代码：BGA48,6X8,30
封装形状：RECTANGULAR封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH
并行/串行：PARALLEL峰值回流温度（摄氏度）：260
电源：2.5/3.3 V认证状态：Not Qualified
座面最大高度：1 mm最大待机电流：0.000005 A
最小待机电流：1.5 V子类别：SRAMs
最大压摆率：0.025 mA最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.2 V标称供电电压 (Vsup)：3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Silver/Copper (Sn/Ag/Cu)
端子形式：BALL端子节距：0.75 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：20
宽度：6 mmBase Number Matches：1

CY62157EV30LL-45BVXIT 数据手册

 浏览型号CY62157EV30LL-45BVXIT的Datasheet PDF文件第2页浏览型号CY62157EV30LL-45BVXIT的Datasheet PDF文件第3页浏览型号CY62157EV30LL-45BVXIT的Datasheet PDF文件第4页浏览型号CY62157EV30LL-45BVXIT的Datasheet PDF文件第5页浏览型号CY62157EV30LL-45BVXIT的Datasheet PDF文件第6页浏览型号CY62157EV30LL-45BVXIT的Datasheet PDF文件第7页 
CY62157EV30 MoBL®  
8-Mbit (512K x 16) Static RAM  
reduces power consumption when addresses are not toggling.  
Place the device into standby mode when deselected (CE1  
HIGH or CE2 LOW or both BHE and BLE are HIGH). The input  
or output pins (IO0 through IO15) are placed in a high  
impedance state when:  
Features  
• TSOP I package configurable as 512K x 16 or as 1M x 8  
SRAM  
• High speed: 45 ns  
• Deselected (CE1HIGH or CE2 LOW)  
• Outputs are disabled (OE HIGH)  
• Wide voltage range: 2.20V–3.60V  
• Pin compatible with CY62157DV30  
• Ultra low standby power  
• Both Byte High Enable and Byte Low Enable are disabled  
(BHE, BLE HIGH)  
— Typical Standby current: 2 µA  
• Write operation is active (CE1 LOW, CE2 HIGH and WE  
LOW)  
— Maximum Standby current: 8 µA (Industrial)  
• Ultra low active power  
To write to the device, take Chip Enable (CE1 LOW and CE2  
HIGH) and Write Enable (WE) inputs LOW. If Byte Low Enable  
(BLE) is LOW, then data from IO pins (IO0 through IO7) is  
written into the location specified on the address pins (A0  
through A18). If Byte High Enable (BHE) is LOW, then data  
from IO pins (IO8 through IO15) is written into the location  
specified on the address pins (A0 through A18).  
— Typical active current: 1.8 mA @ f = 1 MHz  
• Easy memory expansion with CE1, CE2, and OE features  
• Automatic power down when deselected  
• CMOS for optimum speed and power  
• Available in both Pb-free and non Pb-free 48-ball VFBGA,  
Pb-free 44-pin TSOP II and 48-pin TSOP I packages  
To read from the device, take Chip Enable (CE1 LOW and CE2  
HIGH) and Output Enable (OE) LOW while forcing the Write  
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then  
data from the memory location specified by the address pins  
appear on IO0 to IO7. If Byte High Enable (BHE) is LOW, then  
data from memory appears on IO8 to IO15. See the “Truth  
Table” on page 10 for a complete description of read and write  
modes.  
Functional Description[1]  
The CY62157EV30 is a high performance CMOS static RAM  
organized as 512K words by 16 bits. This device features  
advanced circuit design to provide ultra low active current.  
This is ideal for providing More Battery Life™ (MoBL®) in  
portable applications such as cellular telephones. The device  
also has an automatic power down feature that significantly  
Logic Block Diagram  
DATA IN DRIVERS  
A10  
A 9  
A 8  
A 7  
A 6  
A 5  
512K × 16 / 1M x 8  
RAM Array  
IO0–IO7  
A 4  
A 3  
IO8–IO15  
A 2  
A 1  
A 0  
COLUMN DECODER  
BYTE  
CE2  
CE  
BHE  
WE  
1
PowerDown  
Circuit  
CE2  
CE  
BHE  
BLE  
1
OE  
BLE  
Notes  
1. For best practice recommendations, please refer to the Cypress application note AN1064, SRAM System Guidelines.  
Cypress Semiconductor Corporation  
Document #: 38-05445 Rev. *E  
•
198 Champion Court  
•
San Jose, CA 95134-1709  
•
408-943-2600  
Revised May 07, 2007  
1234567...14

中文翻译

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CY62157EV30LL-45BVXIT 替代型号

型号 品牌 替代类型 描述 数据表
CY62157EV30LL-45BVXI CYPRESS

类似代替

 8-Mbit (512K x 16) Static RAM

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