5秒后页面跳转
CY62148BLL-70SXI PDF预览

CY62148BLL-70SXI

更新时间: 2024-09-30 12:27:39
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
11页 343K
描述
4-Mbit (512K x 8) Static RAM

CY62148BLL-70SXI 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:SOP, SOP32,.56Reach Compliance Code:compliant
风险等级:5.81最长访问时间:70 ns
I/O 类型:COMMONJESD-30 代码:R-PDSO-G32
JESD-609代码:e4内存密度:4194304 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
湿度敏感等级:3端子数量:32
字数:524288 words字数代码:512000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:512KX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP32,.56
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL电源:5 V
认证状态:Not Qualified最大待机电流:0.00002 A
最小待机电流:2 V子类别:SRAMs
最大压摆率:0.02 mA标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUALBase Number Matches:1

CY62148BLL-70SXI 数据手册

 浏览型号CY62148BLL-70SXI的Datasheet PDF文件第2页浏览型号CY62148BLL-70SXI的Datasheet PDF文件第3页浏览型号CY62148BLL-70SXI的Datasheet PDF文件第4页浏览型号CY62148BLL-70SXI的Datasheet PDF文件第5页浏览型号CY62148BLL-70SXI的Datasheet PDF文件第6页浏览型号CY62148BLL-70SXI的Datasheet PDF文件第7页 
CY62148B MoBL™  
4-Mbit (512K x 8) Static RAM  
is provided by an active LOW Chip Enable (CE), an active  
LOW Output Enable (OE), and three-state drivers. This device  
has an automatic power-down feature that reduces power  
consumption by more than 99% when deselected.  
Features  
• High Speed: 70 ns  
• 4.5V–5.5V operation  
Writing to the device is accomplished by taking Chip Enable  
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O  
pins (I/O0 through I/O7) is then written into the location  
specified on the address pins (A0 through A18).  
• Low active power  
— Typical active current: 2.5 mA @ f = 1 MHz  
— Typical active current: 12.5 mA @ f = fmax(70 ns)  
• Low standby current  
Reading from the device is accomplished by taking Chip  
Enable (CE) and Output Enable (OE) LOW while forcing Write  
Enable (WE) HIGH for read. Under these conditions, the  
contents of the memory location specified by the address pins  
will appear on the I/O pins.  
• Automatic power-down when deselected  
• TTL-compatible inputs and outputs  
• Easy memory expansion with CE and OE features  
• CMOS for optimum speed/power  
The eight input/output pins (I/O0 through I/O7) are placed in a  
high-impedance state when the device is deselected (CE  
HIGH), the outputs are disabled (OE HIGH), or during a write  
operation (CE LOW, and WE LOW).  
• Available in standard 32-lead (450-mil) SOIC, 32-lead  
TSOP II and 32-lead Reverse TSOP II packages  
The CY62148B is available in a standard 32-pin 450-mil-wide  
body width SOIC, 32-pin TSOP II, and 32-pin Reverse TSOP  
II packages.  
Functional Description  
The CY62148B is a high-performance CMOS static RAM  
organized as 512K words by 8 bits. Easy memory expansion  
Logic Block Diagram  
Pin Configuration  
Top View  
SOIC  
TSOP II  
V
A
32  
31  
30  
1
2
3
4
5
6
7
17  
CC  
A
A
A
A
A
16  
15  
14  
12  
18  
29  
28  
27  
26  
WE  
A
A
A
7
13  
6
A
A
8
A
5
9
I/O  
25  
24  
23  
22  
21  
A
A
A
0
8
9
10  
11  
12  
13  
A
4
11  
INPUT BUFFER  
3
2
OE  
A
10  
I/O  
I/O  
1
2
A
0
A
CE  
I/O  
I/O  
1
A
1
A
7
0
A
I/O  
I/O  
I/O  
4
0
1
2
20  
19  
6
A
5
6
I/O  
5
14  
15  
16  
A
I/O  
I/O  
I/O  
I/O  
I/O  
18  
17  
4
3
3
4
5
512K x 8  
ARRAY  
A
7
GND  
A
12  
A
14  
Top View  
Reverse  
TSOP II  
A
16  
A
17  
I/O  
I/O  
I/O  
GND  
I/O  
I/O  
1
17  
18  
19  
20  
21  
22  
16  
15  
14  
13  
12  
11  
10  
9
8
7
6
5
3
I/O  
6
7
POWER  
DOWN  
2
4
5
COLUMN  
DECODER  
CE  
I/O  
I/O  
I/O  
0
6
I/O  
WE  
A
0
7
A
CE  
1
OE  
23 A10  
A
2
24  
A
OE  
A11  
3
25  
26  
27  
28  
29  
30  
A
4
A
A
5
9
A
6
A
8
A
A
13  
7
A
A
A
12  
14  
16  
4
3
2
1
WE  
A
18  
A
31  
32  
15  
A
V
17  
cc  
Cypress Semiconductor Corporation  
Document #: 38-05039 Rev. *C  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised August 2, 2006  
[+] Feedback  

与CY62148BLL-70SXI相关器件

型号 品牌 获取价格 描述 数据表
CY62148BLL-70ZC CYPRESS

获取价格

512K x 8 Static RAM
CY62148BLL-70ZCT CYPRESS

获取价格

Standard SRAM, 512KX8, 70ns, CMOS, PDSO32, TSOP2-32
CY62148BLL-70ZI ROCHESTER

获取价格

Standard SRAM, 512KX8, 70ns, CMOS, PDSO32, TSOP2-32
CY62148BLL-70ZI CYPRESS

获取价格

512K x 8 Static RAM
CY62148BLL-70ZIT CYPRESS

获取价格

暂无描述
CY62148BLL-70ZRC CYPRESS

获取价格

512K x 8 Static RAM
CY62148BLL-70ZRCT CYPRESS

获取价格

Standard SRAM, 512KX8, 70ns, CMOS, PDSO32, REVERSE, TSOP2-32
CY62148BLL-70ZRI ROCHESTER

获取价格

Standard SRAM, 512KX8, 70ns, CMOS, PDSO32, REVERSE, TSOP2-32
CY62148BLL-70ZRI CYPRESS

获取价格

512K x 8 Static RAM
CY62148BLL-70ZRIT CYPRESS

获取价格

Standard SRAM, 512KX8, 70ns, CMOS, PDSO32, REVERSE, TSOP2-32