Datasheet > CY62147EV30_13

CY62147EV30_13

更新时间： 2024-11-19 12:27:51

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
18页	580K
描述
4-Mbit (256 K x 16) Static RAM

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CY62147EV30_13 数据手册

CY62147EV30 MoBL^®Automotive

4-Mbit (256 K × 16) Static RAM

4-Mbit (256

K × 16) Static RAM

portable applications such as cellular telephones. The device

also has an automatic power down feature that significantly

reduces power consumption when addresses are not toggling.

Placing the device into standby mode reduces power

consumption by more than 99 percent when deselected (CE

HIGH or both BLE and BHE are HIGH). The input and output pins

(I/O₀through I/O₁₅) are placed in a high impedance state when:

Features

■ Very high speed: 45 ns

■ Temperature ranges

❐ Automotive-A: –40 °C to +85 °C

❐ Automotive-E: –40 °C to +125 °C

■ Wide voltage range: 2.20 V to 3.60 V

■ Pin compatible with CY62147DV30

■ Deselected (CE HIGH)

■ Outputs are disabled (OE HIGH)

■ Ultra low standby power

❐ Typical standby current: 1 A

■ Both Byte High Enable and Byte Low Enable are disabled

❐ Maximum standby current: 7 A (Automotive-A)

(BHE, BLE HIGH)

■ Ultra low active power

■ Write operation is active (CE LOW and WE LOW)

❐ Typical active current: 2 mA (Automotive-A) at f = 1 MHz

■ Easy memory expansion with CE ^[1]and OE features

To write to the device, take Chip Enable (CE) and Write Enable

(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data

from I/O pins (I/O₀through I/O₇) is written into the location

specified on the address pins (A₀through A₁₇). If Byte High

Enable (BHE) is LOW, then data from I/O pins (I/O₈through

I/O₁₅) is written into the location specified on the address pins

(A₀through A₁₇).

■ Automatic power down when deselected

■ Complementary metal oxide semiconductor (CMOS) for

optimum speed and power

■ Available in Pb-free 48-ball very fine ball grid array (VFBGA)

(single/dual CE option) and 44-pin thin small outline package

(TSOP) II packages

To read from the device, take Chip Enable (CE) and Output

Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If

Byte Low Enable (BLE) is LOW, then data from the memory

location specified by the address pins appear on I/O₀to I/O₇. If

Byte High Enable (BHE) is LOW, then data from memory

appears on I/O₈to I/O₁₅. See the Truth Table on page 12 for a

complete description of read and write modes.

■ Byte power-down feature

Functional Description

The CY62147EV30 is a high performance CMOS static RAM

(SRAM) organized as 256K words by 16 bits. This device

features advanced circuit design to provide ultra low active

current. It is ideal for providing More Battery Life™ (MoBL^) in

For best practice recommendations, refer to the Cypress

application note AN1064, SRAM System Guidelines.

Logic Block Diagram

DATA IN DRIVERS

A₁₀

A₉

A₈

A₇

A₆

A₅

A₄

A₃

A₂

A₁

A₀

256K x 16

I/O₀–I/O₇

RAM Array

I/O₈–I/O₁₅

COLUMN DECODER

BHE

POWER DOWN

CIRCUIT

BHE

BLE

[1]

BLE

Note

1. BGA packaged device is offered in single CE and dual CE options. In this data sheet, for a dual CE device, CE refers to the internal logical combination of CE and

CE such that when CE is LOW and CE is HIGH, CE is LOW. For all other cases CE is HIGH.

Cypress Semiconductor Corporation

Document Number: 001-66256 Rev. *A

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised March 19, 2013

12 3 4 5 6 7...18

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与CY62147EV30_13相关器件

型号	品牌	获取价格	描述	数据表
CY62147EV30AUTO	CYPRESS	获取价格	Automotive 4-Mbit (256K x 16) Static RAM Wide voltage range: 2.20 V to 3.60 V
CY62147EV30LL-45B2XA	CYPRESS	获取价格	Automotive 4-Mbit (256K x 16) Static RAM Wide voltage range: 2.20 V to 3.60 V
CY62147EV30LL-45B2XI	CYPRESS	获取价格	4-Mbit (256K x 16) Static RAM
CY62147EV30LL-45B2XI	INFINEON	获取价格	Asynchronous SRAM
CY62147EV30LL-45B2XIT	CYPRESS	获取价格	Standard SRAM, 256KX16, 45ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, LEAD FREE, VFBGA-48
CY62147EV30LL-45B2XIT	INFINEON	获取价格	Asynchronous SRAM
CY62147EV30LL-45BVI	CYPRESS	获取价格	4-Mbit (256K x 16) Static RAM
CY62147EV30LL-45BVIT	CYPRESS	获取价格	Standard SRAM, 256KX16, 45ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, VFBGA-48
CY62147EV30LL-45BVXA	CYPRESS	获取价格	4-Mbit (256K x 16) Static RAM
CY62147EV30LL-45BVXI	CYPRESS	获取价格	4-Mbit (256K x 16) Static RAM

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