Datasheet > 存储 > SRAM> CY62137CV30LL-70BAIT

CY62137CV30LL-70BAIT

更新时间： 2024-11-09 13:07:11

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
13页	664K
描述
Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48

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CY62137CV30LL-70BAIT 技术参数

生命周期：	Obsolete	零件包装代码：	BGA
包装说明：	TFBGA,	针数：	48
Reach Compliance Code：	unknown	ECCN代码：	3A991.B.2.A
HTS代码：	8542.32.00.41	Factory Lead Time：	1 week
风险等级：	5.75	Is Samacsys：	N
最长访问时间：	70 ns	JESD-30 代码：	S-PBGA-B48
JESD-609代码：	e0	长度：	7 mm
内存密度：	2097152 bit	内存集成电路类型：	STANDARD SRAM
内存宽度：	16	功能数量：	1
端子数量：	48	字数：	131072 words
字数代码：	128000	工作模式：	ASYNCHRONOUS
最高工作温度：	85 °C	最低工作温度：	-40 °C
组织：	128KX16	封装主体材料：	PLASTIC/EPOXY
封装代码：	TFBGA	封装形状：	SQUARE
封装形式：	GRID ARRAY, THIN PROFILE, FINE PITCH	并行/串行：	PARALLEL
认证状态：	Not Qualified	座面最大高度：	1.2 mm
最大供电电压 (Vsup)：	3.3 V	最小供电电压 (Vsup)：	2.7 V
标称供电电压 (Vsup)：	3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	TIN LEAD	端子形式：	BALL
端子节距：	0.75 mm	端子位置：	BOTTOM
宽度：	7 mm	Base Number Matches：	1

CY62137CV30LL-70BAIT 数据手册

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CY62137CV30/33 MoBL^®

CY62137CV MoBL^®

2-Mbit (128K x 16) Static RAM

ultra-low active current. This is ideal for providing More Battery

Life™ (MoBL^®) in portable applications such as cellular

telephones. The devices also has an automatic power-down

feature that significantly reduces power consumption by 80%

when addresses are not toggling. The device can also be put

into standby mode reducing power consumption by more than

99% when deselected (CE HIGH or both BLE and BHE are

HIGH). The input/output pins (I/O₀through I/O₁₅) are placed

in a high-impedance state when: deselected (CE HIGH),

outputs are disabled (OE HIGH), both Byte High Enable and

Byte Low Enable are disabled (BHE, BLE HIGH), or during a

write operation (CE LOW, and WE LOW).

Features

• Very high speed

— 55 ns

• Temperature Ranges

— Industrial: - 40°C to + 85°C

— Automotive: - 40°C to + 125°C

• Pin-compatible with the CY62137V

• Ultra-low active power

— Typical active current: 1.5 mA @ f = 1 MHz

— Typical active current: 7 mA @ f = f_Max(55 ns speed)

• Low and ultra-low standby power

• Easy memory expansion with CE and OE features

• Automatic power-down when deselected

• CMOS for optimum speed/power

Writing to the device is accomplished by taking Chip Enable

(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable

(BLE) is LOW, then data from I/O pins (I/O₀through I/O₇), is

written into the location specified on the address pins (A₀

through A₁₆). If Byte High Enable (BHE) is LOW, then data

from I/O pins (I/O₈through I/O₁₅) is written into the location

specified on the address pins (A₀through A₁₆).

Reading from the device is accomplished by taking Chip

Enable (CE) and Output Enable (OE) LOW while forcing the

Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,

then data from the memory location specified by the address

pins will appear on I/O₀to I/O₇. If Byte High Enable (BHE) is

LOW, then data from memory will appear on I/O₈to I/O₁₅. See

the truth table at the back of this data sheet for a complete

description of read and write modes.

• Available in Pb-free and non Pb-free 48-ball FBGA

package

Functional Description^[1]

The CY62137CV30/33 and CY62137CV are high-perfor-

mance CMOS static RAMs organized as 128K words by 16

bits. These devices feature advanced circuit design to provide

Logic Block Diagram

DATA IN DRIVERS

A₁₀

A₉

A₈

A₇

A₆

A₅

A₄

A₃

A₂

128K x 16

RAM Array

I/O₀–I/O₇

I/O₈–I/O₁₅

A₁

A₀

COLUMN DECODER

BHE

BLE

Power -Down

Circuit

BHE

BLE

Note:

1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.

Cypress Semiconductor Corporation

Document #: 38-05201 Rev. *G

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised July 21, 2006

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与CY62137CV30LL-70BAIT相关器件

型号	品牌	获取价格	描述	数据表
CY62137CV30LL-70BVE	CYPRESS	获取价格	2-Mbit (128K x 16) Static RAM
CY62137CV30LL-70BVET	CYPRESS	获取价格	Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, FBGA-48
CY62137CV30LL-70BVI	CYPRESS	获取价格	2M (128K x 16) Static RAM
CY62137CV30LL-70BVIT	CYPRESS	获取价格	Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, FBGA-48
CY62137CV30LL-70BVXE	CYPRESS	获取价格	2-Mbit (128K x 16) Static RAM
CY62137CV30LL-70BVXI	CYPRESS	获取价格	2M (128K x 16) Static RAM
CY62137CV30LL-70BVXI	ROCHESTER	获取价格	128KX16 STANDARD SRAM, 70ns, PBGA48, 6 X 8 MM, 1 MM HEIGHT, LEAD FREE, FBGA-48
CY62137CV30LL-70BVXIT	CYPRESS	获取价格	Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, LEAD FREE, FBGA-48
CY62137CV33	CYPRESS	获取价格	2M (128K x 16) Static RAM
CY62137CV33LL	CYPRESS	获取价格	2-Mbit (128K x 16) Static RAM

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