5秒后页面跳转
捷配首页

Datasheet > CY62127BV
CY62127BV PDF预览

CY62127BV

更新时间： 2024-11-04 22:40:23
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
11页 267K
描述
64K x 16 Static RAM

阅读下载

中文翻译

获取价格

CY62127BV 数据手册

 浏览型号CY62127BV的Datasheet PDF文件第2页浏览型号CY62127BV的Datasheet PDF文件第3页浏览型号CY62127BV的Datasheet PDF文件第4页浏览型号CY62127BV的Datasheet PDF文件第5页浏览型号CY62127BV的Datasheet PDF文件第6页浏览型号CY62127BV的Datasheet PDF文件第7页 
27BV  
CY62127BV  
64K x 16 Static RAM  
Writing to the device is accomplished by taking Chip Enable  
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable  
(BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is  
written into the location specified on the address pins (A0  
through A15). If Byte High Enable (BHE) is LOW, then data  
from I/O pins (I/O9 through I/O16) is written into the location  
specified on the address pins (A0 through A15).  
Features  
• 2.7V–3.6V operation  
• CMOS for optimum speed/power  
• Low active power (70 ns, LL version)  
— 54 mW (max.) (15 mA)  
• Low standby power (70 ns, LL version)  
— 54 µW (max.) (15 µA)  
Reading from the device is accomplished by taking Chip  
Enable (CE) and Output Enable (OE) LOW while forcing the  
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,  
then data from the memory location specified by the address  
pins will appear on I/O1 to I/O8. If Byte High Enable (BHE) is  
LOW, then data from memory will appear on I/O9 to I/O16. See  
the truth table at the back of this data sheet for a complete  
description of read and write modes.  
• Automatic power-down when deselected  
— Power down either with CE or BHE and BLE HIGH  
• Independent control of Upper and Lower Bytes  
• Available in 44-pin TSOP II (forward) and fBGA  
Functional Description  
The input/output pins (I/O1 through I/O16) are placed in a  
high-impedance state when the device is deselected (CE  
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE  
are disabled (BHE, BLE HIGH), or during a write operation (CE  
LOW, and WE LOW).  
The CY62127BV is a high-performance CMOS Static RAM  
organized as 65,536 words by 16 bits. This device has an au-  
tomatic power-down feature that significantly reduces power  
consumption by 99% when deselected. The device enters  
power-down mode when CE is HIGH or when CE is LOW and  
both BLE and BHE are HIGH.  
The CY62127BV is available in standard 44-pin TSOP Type II  
(forward pinout) and fBGA packages.  
Logic Block Diagram  
Pin  
Configurations  
TSOP II (Forward)  
Top View  
DATA IN DRIVERS  
44  
1
A
4
A
5
43  
42  
41  
40  
39  
38  
A
A
2
3
4
5
6
3
6
A
A
A
A
A
A
A
A
A
12  
11  
10  
A
A
2
7
OE  
A
1
A
BHE  
BLE  
I/O  
I/O  
I/O  
0
9
7
6
CE  
64K x 16  
I/O  
7
1
16  
I/O –I/O  
RAM Array  
1024 X 1024  
37  
36  
35  
34  
33  
1
8
I/O  
I/O  
8
2
3
15  
14  
13  
3
2
9
I/O –I/O  
10  
11  
12  
13  
9
16  
I/O  
V
SS  
I/O  
4
CC  
V
SS  
1
0
V
V
CC  
A
I/O  
32  
31  
30  
29  
28  
27  
I/O  
I/O  
5
6
7
8
12  
11  
I/O  
I/O  
I/O  
14  
15  
16  
I/O  
I/O  
10  
9
COLUMN DECODER  
WE 17  
18  
NC  
A
A
A
A
15  
14  
13  
8
19  
20  
21  
22  
26  
25  
A
9
10  
11  
A
A
BHE  
A
12  
WE  
CE  
OE  
24  
23  
NC  
NC  
BLE  
Cypress Semiconductor Corporation  
•
3901 North First Street  
•
San Jose  
•
CA 95134  
•
408-943-2600  
Document #: 38-05155 Rev. **  
Revised September 6, 2001  
1234567...11

中文翻译

下载PDF

与CY62127BV相关器件

型号 品牌 获取价格 描述 数据表
CY62127BV_02 CYPRESS

获取价格

 		1M (64K x 16) Static RAM
CY62127BVLL-55BAI CYPRESS

获取价格

 		64K x 16 Static RAM
CY62127BVLL-55ZI CYPRESS

获取价格

 		64K x 16 Static RAM
CY62127BVLL-55ZIT CYPRESS

获取价格

 		Standard SRAM, 64KX16, 55ns, CMOS, PDSO44, TSOP2-44
CY62127BVLL-70BAI CYPRESS

获取价格

 		64K x 16 Static RAM
CY62127BVLL-70ZI CYPRESS

获取价格

 		64K x 16 Static RAM
CY62127DV18 CYPRESS

获取价格

 		1M (64K x 16) Static RAM
CY62127DV18_05 CYPRESS

获取价格

 		1 Mb (64K x 16) Static RAM
CY62127DV18L-55BVI CYPRESS

获取价格

 		1M (64K x 16) Static RAM
CY62127DV18L-55ZI CYPRESS

获取价格

 		1M (64K x 16) Static RAM

与CY62127BV相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证