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CY54FCT541TQSOP PDF预览

CY54FCT541TQSOP

更新时间: 2024-02-26 15:18:12
品牌 Logo 应用领域
德州仪器 - TI 驱动器
页数 文件大小 规格书
8页 84K
描述
8-Bit Buffers/Line Drivers

CY54FCT541TQSOP 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QLCC
包装说明:QCCN, LCC20,.35SQ针数:20
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.48其他特性:WITH DUAL OUTPUT ENABLE
控制类型:ENABLE LOW系列:FCT
JESD-30 代码:S-CQCC-N20JESD-609代码:e0
长度:8.89 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.032 A
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:QCCN
封装等效代码:LCC20,.35SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:9 ns
传播延迟(tpd):9 ns认证状态:Not Qualified
筛选级别:38535Q/M;38534H;883B座面最大高度:1.905 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:NO LEAD端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:8.89 mmBase Number Matches:1

CY54FCT541TQSOP 数据手册

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Data sheet acquired from Cypress Semiconductor Corporation.  
Data sheet modified to remove devices not offered.  
CY54/74FCT540T  
CY54/74FCT541T  
SCCS029 - May 1994 - Revised March 2000  
8-Bit Buffers/Line Drivers  
Features  
Functional Description  
Function, pinout, and drive compatible with FCT and  
The FCT540T inverting buffer/line driver and the FCT541T  
non-inverting buffer/line driver are designed to be employed as  
memory address drivers, clock drivers, and bus-oriented  
transmitters/receivers. The devices provide speed and drive  
capabilities equivalent to their fastest bipolar logic  
counterparts while reducing power dissipation. The input and  
output voltage levels allow direct interface with TTL, NMOS,  
and CMOS devices without external components.  
F logic  
FCT-C speed at 4.1 ns max. (Com’l)  
FCT-A speed at 4.8 ns max. (Com’l)  
Reduced VOH (typically = 3.3V) versions of equivalent  
FCT functions  
Edge-rate control circuitry for significantly improved  
noise characteristics  
Power-off disable feature  
ESD > 2000V  
The outputs are designed with a power-off disable feature to  
allow for live insertion of boards.  
Matched rise and fall times  
Fully compatible with TTL input and output logic levels  
• Sink current  
Source current  
64 mA (Com’l), 48 mA (Mil)  
32 mA (Com’l), 12 mA (Mil)  
Extended commercial range of 40˚C to +85˚C  
Pin Configurations  
Logic Block Diagram—FCT540T  
CERDIP/SOIC/QSOP  
Top View  
OE  
A
OE  
B
1
20  
19  
18  
17  
16  
OE  
V
A
CC  
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
2
OE  
B
3
O
O
O
0
1
4
5
2
FCT540T  
6
O
15  
14  
3
4
5
6
7
O
O
O
O
7
8
13  
12  
11  
9
GND  
10  
Logic Block Diagram—FCT541T  
CERDIP/DIP/SOIC/QSOP  
Top View  
OE  
OE  
B
A
1
20  
19  
18  
17  
16  
OE  
V
CC  
A
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
2
3
4
5
6
OE  
B
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
FCT541T  
15  
14  
7
8
9
13  
12  
11  
GND  
10  
Copyright © 2000, Texas Instruments Incorporated  

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