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CY2XF23_11 PDF预览

CY2XF23_11

更新时间: 2024-11-19 09:41:51
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 振荡器
页数 文件大小 规格书
16页 467K
描述
High Performance LVDS Oscillator with Frequency Margining - I2C Control

CY2XF23_11 数据手册

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CY2XF23  
High Performance LVDS Oscillator with  
Frequency Margining - I2C Control  
High Performance LVDS Oscillator with Frequency Margining - I2C Control  
Features  
Functional Description  
Low jitter crystal oscillator (XO)  
The CY2XF23 is a high-performance and high-frequency XO. It  
uses a Cypress proprietary low-noise PLL to synthesize the  
frequency from an integrated crystal. The output frequency can  
be changed using the I2C bus serial interface, allowing easy  
frequency margin testing in applications.  
Less than 1 ps typical root mean square (RMS) phase jitter  
Low-voltage differential signaling (LVDS) output  
Output frequency from 50 MHz to 690 MHz  
Frequency margining through I2C bus  
The CY2XF23 is available as a factory-configured device or as  
a field-programmable device. Factory configured devices are  
configured  
for  
general  
use  
(see  
Standard  
and  
Factory-configured or field-programmable  
Integrated phase-locked loop (PLL)  
Application-Specific Factory Configurations) or they can be  
customer specific.  
Pb-free package: 5.0 × 3.2 mm leadless chip carrier (LCC)  
Supply voltage: 3.3 V or 2.5 V  
Commercial and industrial temperature ranges  
Logic Block Diagram  
4
CRYSTAL  
OSCILLATOR  
LOW-NOISE  
CLK  
PLL  
OUTPUT  
DIVIDER  
5
CLK#  
PROGRAMMABLE  
CONFIGURATION  
1
I2C  
SDA  
INTERFACE  
2
SCL  
Cypress Semiconductor Corporation  
Document Number: 001-53145 Rev. *E  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised April 14, 2011  
[+] Feedback  

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