CY2HH8110

更新时间： 2024-11-20 02:56:55

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
7页	90K
描述
1.5V 1:10 HSTL Fanout Buffer

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中文翻译

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数据手册

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CY2HH8110 数据手册

CY2HH8110

1.5V 1:10 HSTL Fanout Buffer

Features

Description

• DC to 150-MHz operation

• 1.5V power supply

The CY2HH8110 is a low-voltage HSTL fanout buffer

designed for data communications, clock management, and

specialty memory applications.

• One single-ended HSTL input

• Ten single-ended Class II HSTL outputs

• Less than 1.9% Duty Cycle distortion

• Balanced 16-mA output drive

• Output Enable/Disable

• Low output-output skew

• Operating temperature range: 0°C to +85°C

• 32-pin TQFP package

The class II HSTL outputs are balanced Push-Pull in design

capable of delivering 16 mA into 10 pF load. This class allows

both source series termination and symmetrically double

parallel termination.

The CY2HH8110 low-output duty cycle distortion makes it

suitable for Double Data Rate (DDR) applications.

Block Diagram

Pin Configuration

Q 1

Q 2

32 31 30 29 28 27 26 25

VDD

GND

VDD

CY2HH8110

GND

Q 9

Q 10

VDD

GND

9 10 11 12 13 14 15 16

Cypress Semiconductor Corporation

Document #: 38-07556 Rev **

•

3901 North First Street

•

San Jose, CA 95134

•

408-943-2600

Revised August 1, 2003

12 3 4 5 6 7

中文翻译

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