CY2DP1510AXIT

更新时间： 2024-11-20 09:41:51

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		时钟
页数	文件大小	规格书
13页	298K
描述
1:10 LVPECL Fanout Buffer with Selectable Clock Input

阅读下载

中文翻译

获取价格

数据手册
替代型号

如果您发现信息不准确，欢迎纠错

CY2DP1510AXIT 数据手册

CY2DP1510

1:10 LVPECL Fanout Buffer with Selectable

Clock Input

Features

Functional Description

■ Select one of two low-voltage positive emitter-coupled logic

(LVPECL) input pairs to distribute to 10 LVPECL output pairs

The CY2DP1510 is an ultra-low noise, low skew,

low-propagation delay 1:10 LVPECL fanout buffer targeted to

meet the requirements of high-speed clock distribution

applications. The CY2DP1510 can select between two separate

LVPECL input clock pairs using the IN_SEL pin. The device has

a fully differential internal architecture that is optimized to

achieve low additive jitter and low skew at operating frequencies

of up to 1.5 GHz.

■ 40-ps maximum output-to-output skew

■ 600-ps maximum propagation delay

■ 0.11-ps maximum additive RMS phase jitter at 156.25 MHz

(12-kHz to 20-MHz offset)

■ Up to 1.5-GHz operation

■ 32-Pin thin quad flat pack (TQFP) package

■ 2.5-V or 3.3-V operating voltage^[1]

■ Commercial and industrial operating temperature range

Logic Block Diagram

V_DD

Q0#

Q1#

V_DD

V_SS

Q2#

IN0

IN0#

Q3#

IN1

IN1#

Q4#

Q5#

IN_SEL

100k

Q6#

V_BB

Q7#

Q8#

Q9#

Note

1. Input AC-coupling capacitors are required for voltage-translation applications.

Cypress Semiconductor Corporation

Document Number: 001-55566 Rev. *G

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised February 25, 2011

[+] Feedback

12 3 4 5 6 7...13

中文翻译

下载PDF

CY2DP1510AXIT 替代型号

型号	品牌	替代类型	描述	数据表
CY2DP1510AXCT	CYPRESS	类似代替	1:10 LVPECL Fanout Buffer with Selectable Clock Input
CY2DP1510AXC	CYPRESS	类似代替	1:10 LVPECL Fanout Buffer with Selectable Clock Input

与CY2DP1510AXIT相关器件

型号	品牌	获取价格	描述	数据表
CY2DP3110	CYPRESS	获取价格	1 of 2:10 Differential Clock/Data Fanout Buffer
CY2DP3110AI	CYPRESS	获取价格	1 of 2:10 Differential Clock/Data Fanout Buffer
CY2DP3110AIT	CYPRESS	获取价格	1 of 2:10 Differential Clock/Data Fanout Buffer
CY2DP3110AXI	CYPRESS	获取价格	Low Skew Clock Driver, 2DP Series, 10 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7
CY2DP3110AXIT	CYPRESS	获取价格	Low Skew Clock Driver, 2DP Series, 10 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7
CY2DP3120	CYPRESS	获取价格	1:20 Differential Clock/Data Fanout Buffer
CY2DP3120AI	CYPRESS	获取价格	1:20 Differential Clock/Data Fanout Buffer
CY2DP3120AIT	CYPRESS	获取价格	1:20 Differential Clock/Data Fanout Buffer
CY2DP3120AXI	CYPRESS	获取价格	1:20 Differential Clock/Data Fanout Buffer
CY2DP3120AXIT	CYPRESS	获取价格	1:20 Differential Clock/Data Fanout Buffer