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CY29FCT818ATPC PDF预览

CY29FCT818ATPC

更新时间： 2024-11-21 14:48:43
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
6页 154K
描述
Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDIP24, 0.300 INCH, PLASTIC, DIP-24

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CY29FCT818ATPC 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：DIP包装说明：DIP,
针数：24Reach Compliance Code：not_compliant
HTS代码：8542.39.00.01风险等级：5.14
其他特性：SCANNABLE系列：FCT
JESD-30 代码：R-PDIP-T24JESD-609代码：e0
长度：31.623 mm负载电容（CL）：50 pF
逻辑集成电路类型：BUS DRIVER位数：8
功能数量：1端口数量：2
端子数量：24最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT SPECIFIED
传播延迟（tpd）：9 ns认证状态：Not Qualified
座面最大高度：4.826 mm最大供电电压 (Vsup)：5.25 V
最小供电电压 (Vsup)：4.75 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.62 mmBase Number Matches：1

CY29FCT818ATPC 数据手册

 浏览型号CY29FCT818ATPC的Datasheet PDF文件第2页浏览型号CY29FCT818ATPC的Datasheet PDF文件第3页浏览型号CY29FCT818ATPC的Datasheet PDF文件第4页浏览型号CY29FCT818ATPC的Datasheet PDF文件第5页浏览型号CY29FCT818ATPC的Datasheet PDF文件第6页 
1CY29FCT818T  
fax id: 7023  
CY29FCT818T  
Diagnostic Scan Register  
circuits, where it is desirable to load known data at a specific  
location in the circuit and to read the data at that location.  
Features  
• Function, pinout and drive compatiblewithFCT, F Logic  
The shadow registers can load data from the output of the  
FCT818T, and can be used as a right-shift register with  
bit-serial input SDI and output SDO, using DCLK. The data  
register input is multiplexed to enable loading from the shadow  
register or from the data input pins using PCLK. Note that data  
can be loaded simultaneously from the shadow register to the  
pipeline register, and from the pipeline register to the shadow  
register provided set-up and hold time requirements are  
satisfied with respect to the two independent clock inputs.  
and AM29818  
• FCT-C speed at 6.0 ns max. (Com’l),  
• Reduced V  
(typically = 3.3V) versions of equivalent  
OH  
FCT functions  
• Edge-rate control circuitry for significantly improved  
noise characteristics  
• Power-off disable feature  
• Matched rise and fall times  
In a typical application, the general-purpose register in the  
FCT818T replaces an 8-bit data register in the normal data  
path of a system. The shadow register is placed in an auxiliary  
bit-serial loop which is used for diagnostics. During diagnostic  
operation, data is shifted serially into the shadow register, then  
transferred to the general purpose register to load a known  
value into the data path. To read the contents at that point in  
the data path, the data is transferred from the data register into  
the shadow register, then shifted serially in the auxiliary  
diagnostic loop to make it accessible to the diagnostics  
controller. This data is then compared with the expected value  
to diagnose faulty operation of the sequential circuit.  
• Fully compatible with TTL input and output logic levels  
• Sink current  
64 mA (Com’l),  
20 mA (Mil)  
Source current 32 mA (Com’l),  
3 mA (Mil)  
• 8-Bit pipeline and shadow register  
• ESD > 2000V  
Functional Description  
The FCT818T contains a high-speed 8-bit general-purpose  
data pipeline register and a high-speed 8-bit shadow register.  
The general-purpose register can be used in an 8-bit wide data  
path for a normal system application. The shadow register is  
designed for applications, such as diagnostics in sequential  
The outputs are designed with a power-off disable feature to  
allow for live insertion of boards.  
Logic Block Diagram  
Pin Configurations  
DIP, SOIC, QSOP  
LCC  
Top View  
Top View  
1
24  
V
OE  
CC  
D −D  
0
7
2
3
4
5
6
DCLK  
23  
22  
21  
MODE  
SDI  
8-BIT  
1110  
9 8 7 6 5  
Y
0
D
0
SHADOW  
REGISTER  
DCLK  
D
4
SDO  
0
12  
13  
14  
15  
16  
D
7
Y
1
D
1
DCLK  
OE  
NC  
3
2
1
SDI  
GND  
NC  
PCLK  
SDO  
Y
2
20  
19  
18  
17  
16  
D
2
Y
3
D
3
D
4
D
5
D
6
D
7
CLK  
S −S  
0
V
cc  
7
28  
27  
26  
Y
4
7
8
MODE  
Y
0
17  
18  
Y
5
8
Y
7
D
Q
Y
6
19 2021 222324 25  
9
Y
7
10  
11  
12  
15  
14  
MODE  
SDO  
MUX  
SDI  
GND  
PCLK  
13  
8
8-BIT  
PCLK  
OE  
PIPELINE  
REGISTER  
P −P  
0
7
8
8
Y −Y  
0
7
Cypress Semiconductor Corporation  
•
3901 North First Street  
•
San Jose  
•
CA 95134  
•
408-943-2600  
May 1994 – Revised March 17, 1997  
123456

中文翻译

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