Datasheet > CY28RS480ZXC

CY28RS480ZXC

更新时间： 2024-09-27 04:38:03

品牌	Logo	应用领域
SPECTRALINEAR		时钟发生器
页数	文件大小	规格书
14页	144K
描述
Clock Generator for ATI RS480 Chipset

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中文翻译

获取价格

数据手册

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CY28RS480ZXC 数据手册

CY28RS480

Clock Generator for ATI^£ꢀRS480 Chipset

• I²C support with readback capabilities

Features

• Ideal Lexmark Spread Spectrum profile for maximum

electromagnetic interference (EMI) reduction

• Supports AMD^£CPU

• 200 MHz differential CPU clock pairs

• 100 MHz differential SRC clocks

• 48 MHz USB clock

• 3.3V power supply

• 56-pin SSOP and TSSOP packages

CPU

SRC

HTT66

PCI

REF

x 3

USB_48

x 1

• 33 MHz PCI clock

• 66 MHz HyperTransport¥ clock

Block Diagram

Pin Configuration

VDD_REF

REF[0:2]

XIN

XOUT

VDD_48

USB_48

VSS_48

SCLK

SDATA

VDD_REF

VSS_REF

REF0

REF1

REF2

VDD_PCI

PCI0

VSS_PCI

VDD_HTT

HTT66

VSS_HTT

CPUT0

CPUC0

VDD_CPU

VSS_CPU

CPUT1

CPUC1

VDDA

VSSA

IREF

VSS_SRC1

VDD_SRC1

SRCT0

XIN

XTAL

OSC

XOUT

PLL Ref Freq

VDD_CPU

CPUT[0:1], CPUC[0:1],

Divider

CPU_STP#

PLL1

Network

CLKREQ[0:1]#

VDD_SRC

SRCT[0:5],SRCC[0:5]

VDD_SRCS

SRCST[0:1],SRCSC[0:1]

IREF

CLKREQ#0

CLKREQ#1

SRCT5

SRCC5

VDD_SRC

VSS_SRC

SRCT4

SRCC4

SRCT3

SRCC3

VSS_SRC

VDD_SRC

SRCT2

SRCC2

SRCT1

SRCC1

VSS_SRC

SRCST1

SRCSC1

VDD_PCI

PCI

VDD_HTT

HTT66

VDD_48 MHz

USB_48

PLL2

SRCC0

VDD_SRCS

VSS_SRCS

SRCST0

SDATA

SCLK

I C

Logic

SRCSC0

56 SSOP/TSSOP

Rev 1.0, November 22, 2006

2200 Laurelwood Road, Santa Clara, CA 95054

Page 1 of 14

www.SpectraLinear.com

Tel:(408) 855-0555 Fax:(408) 855-0550

12 3 4 5 6 7...14

中文翻译

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