Datasheet > CY28410ZXC

CY28410ZXC

更新时间： 2024-09-23 04:38:03

品牌	Logo	应用领域
SPECTRALINEAR		晶体时钟发生器外围集成电路光电二极管
页数	文件大小	规格书
17页	220K
描述
Clock Generator for Intel Grantsdale Chipset

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中文翻译

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数据手册

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CY28410ZXC 数据手册

CY28410

Clock Generator for Intel^£Grantsdale Chipset

• 33 MHz PCI clock

Features

• Low-voltage frequency select input

• I²C support with readback capabilities

• Compliant with Intel^£CK410

• Supports Intel P4 and Tejas CPU

• Selectable CPU frequencies

• Differential CPU clock pairs

• 100 MHz differential SRC clocks

• 96 MHz differential dot clock

• 48 MHz USB clocks

• Ideal Lexmark Spread Spectrum profile for maximum

electromagnetic interference (EMI) reduction

• 3.3V power supply

• 56-pin SSOP and TSSOP packages

CPU

SRC

PCI

x 9

REF

x 1

DOT96

x 1

USB_48

x 1

x2 / x3

x6 / x7

Block Diagram

Pin Configuration

VDD_REF

REF

VDD_PCI

VSS_PCI

PCI3

PCI2

PCI1

PCI0

FS_C/TEST_SEL

REF

VSS_REF

XIN

XOUT

VDD_REF

SDATA

SCLK

VSS_CPU

CPUT0

CPUC0

VDD_CPU

CPUT1

CPUC1

IREF

VSSA

VDDA

CPUT2_ITP/SRCT7

CPUC2_ITP/SRCC7

VDD_SRC

SRCT6

XIN

XTAL

OSC

XOUT

PLL Ref Freq

VDD_CPU

PCI4

PCI5

VSS_PCI

VDD_PCI

PCIF0/ITP_EN

PCIF1

CPUT[0:1], CPUC[0:1],

CPU(T/C)2_ITP]

VDD_SRC

Divider

PLL1

Network

SRCT[1:6], SRCC[1:6]

FS_[C:A]

VTT_PWRGD#

IREF

PCIF2

VDD_PCI

PCI[0:5]

VDD_48

USB_48

VSS_48

DOT96T

DOT96C

VDD_PCIF

PCIF[0:2]

VDD_48 MHz

FS_B/TEST_MODE

VTT_PWRGD#/PD

FS_A

DOT96T

DOT96C

PLL2

USB_48

SRCT1

SRCC1

VDD_SRC

SRCT2

SRCC2

SRCT3

SRCC3

SRC4-SATAT

SRC4_SATAC

VDD_SRC

SRCC6

SRCT5

SRCC5

VSS_SRC

SDATA

SCLK

I C

Logic

56 SSOP/TSSOP

Rev 1.0, November 21, 2006

2200 Laurelwood Road, Santa Clara, CA 95054

Page 1 of 17

Tel:(408) 855-0555 Fax:(408) 855-0550

www.SpectraLinear.com

12 3 4 5 6 7...17

中文翻译

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