Datasheet > CY28405-2

CY28405-2

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
SPECTRALINEAR		时钟
页数	文件大小	规格书
48页	497K
描述
Clock Synthesizer with Differential SRC and CPU Outputs

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CY28405-2 数据手册

CY28405-2

Clock Synthesizer with Differential SRC and CPU Outputs

• Three differential CPU clock pairs

• One differential SRC clock

• Support SMBus/I²C Byte, Word and Block Read/ Write

Features

• Supports Intel^£Pentium^®4-type CPUs

• Selectable CPU frequencies

• 3.3V power supply

• Ideal Lexmark Spread Spectrum profile for maximum

electromagnetic interference (EMI) reduction

• Nine copies of PCI clocks

• 48-pin SSOP package

• Four copies of 3V66 with one optional VCH

• Two copies 48-MHz clock

CPU

x 3

SRC

x 1

3V66

x 4

PCI

x 9

REF

x 2

48M

x 2

Pin Configuration^[1]

Block Diagram

VDD_REF

XIN

XTAL

OSC

REF(0:1)

XOUT

PLL Ref Freq

VDD_CPU

*FS_A/REF_0

*FS_B/REF_1

VDD_REF

XIN

VDDA

VSSA

IREF

CPUT_ITP

CPUC_ITP

VSS_CPU

CPUT1

CPUT(0:1, ITP), CPUC(0:1, ITP)

Divider

PLL 1

Network

VDD_SRCT

SRCT, SRCC

FS_(A:B)

VTT_PWRGD#

XOUT

VSS_REF

PCIF0

PCIF1

IREF

CPUC1

VDD_3V66

3V66_(0:2)

PCIF2

VDD_CPU

CPUT0

CPUC0

VSS_SRC

SRCT

SRCC

VDD_SRC

VTT_PWRGD#

SDATA*

SCLK*

3V66_0

3V66_1

VDD_PCI

VSS_PCI

PCI0

VDD_PCI

PCIF(0:2)

PLL2

PCI1

PCI2

PCI3

PCI(0:5)

VDD_PCI

VSS_PCI

PCI4

PCI5

PD#

DOT_48

USB_48

VSS_48

VDD_48

3V66_3/VCH

VDD_48MHz

DOT_48

PD#

USB_48

VSS_3V66

VDD_3V66

3V66_2

SDATA

SCLK

3V66_3/VCH

I C

Logic

SSOP-48

* 100k Internal Pull-up

Note:

1. Signals marked with [*] and [**] have internal pull-up and pull-down resistors, respectively.

Rev 1.0, November 22, 2006

Page 1 of 16

2200 Laurelwood Road, Santa Clara, CA 95054

Tel:(408) 855-0555 Fax:(408) 855-0550

www.SpectraLinear.com

12 3 4 5 6 7...48

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