Datasheet > CY28404

CY28404

更新时间： 2024-11-12 04:38:03

品牌	Logo	应用领域
SPECTRALINEAR		时钟
页数	文件大小	规格书
19页	216K
描述
CK409-Compliant Clock Synthesizer

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中文翻译

获取价格

数据手册

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CY28404 数据手册

CY28404

CK409-Compliant Clock Synthesizer

• Two differential CPU clock pairs

• Support SMBus/I²C Byte, Word, and Block Read/Write

• Dial-A-Frequency^£

Features

• Supports Intel^£Springdale/Prescott (CK409)

• Selectable CPU frequencies

• 3.3V power supply

• Ideal Lexmark Spread Spectrum profile for maximum

electromagnetic interference (EMI) reduction

• Nine copies of PCI clock

• 48-pin SSOP package

Table 1. Frequency Table

• Four copies 3V66 clock with optional VCH

• Three copies 48-MHz clock

• Three copies REF clock

CPU

x 2

3V66

x 4

PCI

x 9

REF

x 3

48M

x 3

Block Diagram

Pin Configuration

VDD_REF

XIN

XTAL

OSC

**FS_A/REF_0

REF_2

VDDA

VSSA

IREF

REF(0:2)

XOUT

**FS_B/REF_1

VDD_REF

XIN

PLL Ref Freq

VDD_CPU

CPUT(0:1), CPUC(0:1)

Divider

PLL 1

XOUT

VSS_CPU

CPUT1

CPUC1

VDD_CPU

CPUT0

CPUC0

VSS

DNC***

VDD

VTT_PWRGD#

SDATA*

SCLK*

3V66_0

3V66_1

VSS_3V66

VDD_3V66

Network

VSS_REF

*FS_C/PCIF0

*FS_D/PCIF1

*FS_E/PCIF2

VDD_PCI

VSS_PCI

PCI0

FS_(A:E)

VTT_PWRGD#

IREF

VDD_3V66

3V66_(0:2)

PCI1

PCI2

PCI3

VDD_PCI

PCIF(0:2)

SEL24#

PLL2

SELVCH

VDD_PCI

VSS_PCI

PCI4

PCI(0:5)

PCI5

MODE

PD#

RESET#/PD#

*SEL24#/24_48MHz

DOT_48

3V66_3/VCH

3V66_2/MODE*

3V66_3/VCH/SELVCH**

VDD_48

USB_48

VSS_48

VDD_48MHz

DOT_48

USB_48

24_48MHz

SSOP-48

SDATA

SCLK

* 150k Internal Pull-up

** 150k Internal Pull-down

*** Do Not Connect

I C

Logic

Timer

RESET#

Rev 1.0, November 22, 2006

2200 Laurelwood Road, Santa Clara, CA 95054

Page 1 of 19

Tel:(408) 855-0555 Fax:(408) 855-0550

www.SpectraLinear.com

12 3 4 5 6 7...19

中文翻译

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