Datasheet > CY28372OXC

CY28372OXC

更新时间： 2024-11-09 02:57:27

品牌	Logo	应用领域
SPECTRALINEAR		晶体外围集成电路光电二极管时钟
页数	文件大小	规格书
17页	227K
描述
SiS 746 AMD Athlon⑩/AMD Duron⑩ Clock Synthesizer

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中文翻译

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数据手册

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CY28372OXC 数据手册

CY28372

SiS 746 AMD Athlon™/AMD Duron™ Clock Synthesizer

• One differential CPU clock (opendrain)

• One singled-ended CPU clock (opendrain)

Features

• Supports AMD Athlon¥/Duron¥ CPU

• 3.3V and 2.5V power supply

• SMBus support with readback capabilities

• Spread Spectrum electromagnetic interference (EMI)

reduction

• Eight copies of PCI clocks

• One 48-MHz USB clock

• 48-pin SSOP package

• Two copies of ZCLK clocks

CPU

x 2

ZCLK

x 2

REF

x 3

PCI

x 8

AGP

x 2

IOAPIC

x 2

48M

x 1

24_48M

x 1

• One 48 MHz/24 MHz programmable SIO clock

Block Diagram

Pin Configuration

VDD_REF

REF0:2

XIN

XTAL

OSC

VDD_REF

**FS0/REF0

**FS1/REF1

REF2

GND_REF

XIN

XOUT

VDD_APIC

IOAPIC1

IOAPIC0

GND_APIC

CPU_STP#*

CPUT1

VDD_CPU

GND_CPU

CPUT0

XOUT

PLL Ref Freq

VDD_CPU

CPUT1

Divider

PLL 1

CPUT0, CPUC0

Network

VDD_Z

**FS0:3

ZCLK0:1

GND_Z

ZCLK0

ZCLK1

CPU_STP#

VDD_APIC

APIC0:1

CPUC0

VDD_Z

VDD_CPU

GNDA

VDDA

SCLK

SDATA

PD#*

GND_AGP

AGP0

AGP1

VDD_AGP

VDD_48

48MHZ

*PCI_STP#

VDD_PCI

**FS2/PCIF0

*FS3/PCIF1

PCI0

VDD_PCI

PCIF0:1

PCI0:5

PCI_STP#

VDD_AGP

AGP0:1

PCI1

Fract.

Aligner

PLL2

GND_PCI

VDD_PCI

PCI2

PCI3

PCI4

PCI5

GND_PCI

VDD_48

48 MHz

PD#

24_48MHZ

GND_48

24_48MHz

SDATA

SCLK

I2C

Logic

SSOP-48

* : Internal Pull-up 150k

** : Internal Pull-down 150k

Rev 1.0, November 20, 2006

2200 Laurelwood Road, Santa Clara, CA 95054

Page 1 of 17

Tel:(408) 855-0555 Fax:(408) 855-0550

www.SpectraLinear.com

12 3 4 5 6 7...17

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