CY28351

更新时间： 2024-09-22 23:16:27

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		驱动器双倍数据速率时钟
页数	文件大小	规格书
8页	75K
描述
Differential Clock Buffer/Driver DDR400- and DDR333-Compliant

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CY28351 数据手册

CY28351

Differential Clock Buffer/Driver

DDR400- and DDR333-Compliant

Description

Features

• Supports 333-MHz and 400-MHz DDR SDRAM

• 60- – 200-MHz operating frequency

This PLL clock buffer is designed for 2.5-V_DDand 2.5-AV_DD

operation and differential outputs levels.

• Phase-locked loop (PLL) clock distribution for double

data rate synchronous DRAM applications

• Distributes one clock input to ten differential outputs

• Externalfeedbackpin(FBIN)isusedtosynchronizethe

outputs to the clock input

• Conforms to the DDRI specification

• Spread Aware for electromagnetic interference (EMI)

reduction

• 48-pin SSOP package

This device is a zero delay buffer that distributes a clock input

(CLKIN) to ten differential pairs of clock outputs (YT[0:9],

YC[0:9]) and one feedback clock output (FBOUT). The clock

outputs are individually controlled by the serial inputs SCLK

and SDATA.

The two-line serial bus can set each output clock pair (YT[0:9],

YC[0:9]) to the Hi-Z state. When AV_DDis grounded, the PLL is

turned off and bypassed for the test purposes.

The PLL in this device uses the input clock (CLKIN) and the

feedback clock (FBIN) to provide high-performance, low-skew,

low-jitter output differential clocks.

Block Diagram

Pin Configuration

VSS

YC5

VSS

YC0

YT0

YC0

YT1

YC1

YT5

YT0

VDDQ

YT6

VDDQ

YT1

YT2

YC2

YC6

YC1

VSS

YT3

YC3

VSS

YC2

SCLK

Serial

Interface

Logic

VSS

YT4

YC4

YC7

SDATA

YT7

YT2

YT5

YC5

VDDQ

SDATA

VDD

SCLK

CLKIN

YT6

YC6

FBIN

VDDQ

CLKIN

FBIN

YT7

YC7

VDDI

AVDD

AVSS

VSS

YC3

FBOUT

PLL

YT8

YC8

VSS

YC8

YT8

YT9

YC9

YT3

VDDQ

YT9

VDDQ

YT4

AVDD

FBOUT

YC9

VSS

YC4

VSS

Cypress Semiconductor Corporation

Document #: 38-07370 Rev. *B

•

3901 North First Street

•

San Jose, CA 95134

•

408-943-2600

Revised May 23, 2003

12 3 4 5 6 7 8

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与CY28351相关器件

型号	品牌	获取价格	描述	数据表
CY28351OC	SPECTRALINEAR	获取价格	Differential Clock Buffer/Driver
CY28351OC	CYPRESS	获取价格	Differential Clock Buffer/Driver DDR400- and DDR333-Compliant
CY28351OC-400T	SILICON	获取价格	PLL Based Clock Driver, PDSO48, SSOP-48
CY28351OCT	CYPRESS	获取价格	Differential Clock Buffer/Driver DDR400- and DDR333-Compliant
CY28351OCT	SPECTRALINEAR	获取价格	Differential Clock Buffer/Driver
CY28351OI-400	SILICON	获取价格	PLL Based Clock Driver, PDSO48, SSOP-48
CY28351OI-400T	SILICON	获取价格	Clock Driver
CY28352	SPECTRALINEAR	获取价格	Differential Clock Buffer/Driver DDR400- and DDR333-Compliant
CY28352	CYPRESS	获取价格	Differential Clock Buffer/Driver DDR400- and DDR333-Compliant
CY28352OC	SPECTRALINEAR	获取价格	Differential Clock Buffer/Driver DDR400- and DDR333-Compliant