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CY28329OXC

更新时间: 2024-02-08 10:45:08
品牌 Logo 应用领域
SPECTRALINEAR 晶体驱动器外围集成电路光电二极管时钟
页数 文件大小 规格书
16页 241K
描述
133 MHz Spread Spectrum Clock Synthesizer/Driver with Differential CPU Outputs

CY28329OXC 技术参数

是否Rohs认证:符合生命周期:Transferred
零件包装代码:TSSOP包装说明:TSSOP, TSSOP56,.3,20
针数:56Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.29Is Samacsys:N
JESD-30 代码:R-PDSO-G56JESD-609代码:e4
长度:14 mm湿度敏感等级:3
端子数量:56最高工作温度:70 °C
最低工作温度:最大输出时钟频率:133 MHz
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP56,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 V主时钟/晶体标称频率:14.31818 MHz
认证状态:Not Qualified座面最大高度:1.1 mm
子类别:Clock Generators最大压摆率:360 mA
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:20宽度:6.1 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFICBase Number Matches:1

CY28329OXC 数据手册

 浏览型号CY28329OXC的Datasheet PDF文件第2页浏览型号CY28329OXC的Datasheet PDF文件第3页浏览型号CY28329OXC的Datasheet PDF文件第4页浏览型号CY28329OXC的Datasheet PDF文件第5页浏览型号CY28329OXC的Datasheet PDF文件第6页浏览型号CY28329OXC的Datasheet PDF文件第7页 
CY28329  
133 MHz Spread Spectrum Clock Synthesizer/Driver  
with Differential CPU Outputs  
Benefits  
Features  
• Multiple output clocks at different frequencies  
— Four pairs of differential CPU outputs, up to 133 MHz  
— Ten synchronous PCI clocks, three free-running  
— Six 3V66 clocks  
• Motherboard clock generator  
— Support Multiple CPUs and a chipset  
— Support for PCI slots and chipset  
— Supports AGP and Hub Link  
— Two 48-MHz clocks  
— Supports USB host controller and graphic controller  
— Supports ISA slots and I/O chip  
— One reference clock at 14.318 MHz  
— One VCH clock  
• Enables reduction of EMI and overall system cost  
• Enables ACPI compliant designs  
• Spread Spectrum clocking (down spread)  
• Power-down features (PCI_STOP#, PD#)  
• Supports up to four CPU clock frequencies  
• Enables ATE and “bed of nails” testing  
• Widely available, standard package enables lower cost  
• Three Select inputs (Mode select & IC Frequency  
Select)  
• OE and Test Mode support  
• 56-pin SSOP package and 56-pin TSSOP package  
Logic Block Diagram  
Pin Configurations  
SSOP and TSSOP  
Top View  
VDD_REF  
REF  
VDD_REF  
XTAL_IN  
XTAL_OUT  
GND_REF  
PCI_F0  
1
2
3
4
5
6
56  
55  
54  
53  
52  
51  
50  
X1  
X2  
XTAL  
OSC  
PWR  
REF  
S1  
CPU3  
CPU3#  
PLL Ref Freq  
Divider  
CPU0  
PLL 1  
Network  
PCI_F1  
CPU0#  
VDD_CPU  
CPU1  
Mult0  
VDD_CPU  
CPU[0:3]  
PCI_F2  
7
PWR  
Gate  
S1:2  
VDD_PCI  
GND_PCI  
PCI0  
49  
48  
47  
46  
45  
44  
43  
8
VTTPWRGD#  
CPU[0:3]#  
CPU1#  
9
GND_CPU  
VDD_CPU  
10  
11  
PCI1  
VDD_PCI  
PWR  
PCI2  
PCI_F[0:2]  
CPU2  
12  
13  
Stop  
Clock  
Control  
PCI3  
CPU2#  
MULT0  
PCI0:6  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
VDD_PCI  
42  
41  
IREF  
PCI_STOP#  
PD#  
GND_PCI  
PCI4  
/2  
VDD_3V66  
3V66_0  
GND_IREF  
S2  
PWR  
40  
39  
38  
PCI5  
PCI6  
3V66_[2:]4/  
66BUFF0:2  
USB  
PWR  
VDD_3V66  
DOT  
3V66_5/ 66IN  
GND_3V66  
VDD_ 48 MHz  
37  
36  
35  
34  
66BUFF0/3V66_2  
66BUFF1/3V66_3  
GND_ 48 MHz  
3V66_1/VCH  
PCI_STOP#  
3V66_0  
VDD_48MHz  
USB (48MHz)  
PLL 2  
PWR  
66BUFF2/3V66_4  
66IN/3V66_5  
33  
32  
31  
30  
29  
24  
25  
DOT (48MHz)  
PD#  
VDD_CORE  
GND_CORE  
VDD_3V66  
GND_3V66  
26  
27  
28  
VCH_CLK/ 3V66_1  
SCLK  
VTTPWRGD#  
SDATA  
SDATA  
SCLK  
SMBus  
Logic  
Rev 1.0, November 24, 2006  
2200 Laurelwood Road, Santa Clara, CA 95054  
Page 1 of 16  
www.SpectraLinear.com  
Tel:(408) 855-0555 Fax:(408) 855-0550  

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