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CY28323B PDF预览

CY28323B

更新时间: 2024-09-22 22:10:35
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
22页 299K
描述
FTG for Intel Pentium 4 CPU and Chipsets

CY28323B 数据手册

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CY28323B  
FTG for Intel® Pentium® 4 CPU and Chipsets  
• Support SMBus byte read/write and block read/ write  
Features  
operations to simplify system BIOS development  
• Compatible to Intel® CK-Titan & CK-408 Clock Synthe-  
sizer/Driver Specifications  
• Vendor ID and Revision ID support  
• Programmable drive strength support  
• Programmable output skew support  
• Power management control inputs  
• Available in 48-pin SSOP  
• System frequency synthesizer for Intel Brookdale 845  
and Brookdale - G Pentium® 4 Chipsets  
• Programmable clock output frequency with less than  
1 MHz increment  
• Integrated fail-safe Watchdog timer for system recov-  
ery  
CPU  
x 3  
3V66  
x 4  
PCI  
x 10  
REF  
x 2  
48M  
x 1  
24_48M  
x 1  
• Automatically switch to HW selected or SW pro-  
grammed clock frequency when Watchdog timer times  
out  
• Capable of generating system RESET after a Watchdog  
timer time-out occurs or a change in output frequency  
via SMBus interface  
Pin Configuration[1]  
Block Diagram  
VDD_REF  
REF0:1  
X1  
X2  
XTAL  
OSC  
PLL Ref Freq  
*MULTSEL1/REF1  
CPU0:1, CPU0:1#,  
1
48  
REF0/MULTSEL0*  
GND_REF  
VDD_CPU  
CPU_ITP  
CPU_ITP#  
GND_CPU  
PWR_DWN#  
CPU0  
Divider  
VDD_CPU  
PLL 1  
Network  
VDD_REF  
X1  
2
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
3
CPU_ITP, CPU_ITP#  
4
*FS0:4  
X2  
VTT_PWRGD#  
5
GND_PCI  
*FS2/PCI_F0  
*FS3/PCI_F1  
PCI_F2  
6
*MULTSEL0:1  
7
8
9
VDD_PCI  
*FS4/PCI0  
PCI1  
CPU0#  
VDD_3V66  
3V66_0:3  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
VDD_CPU  
CPU1  
PCI2  
CPU1#  
PWR_DWN#  
GND_PCI  
PCI3  
GND_CPU  
IREF  
VDD_PCI  
PCI_F0:2  
PCI4  
VDD_CORE  
GND_CORE  
VDD_3V66  
3V66_0  
PCI0:6  
PCI5  
PCI6  
VDD_PCI  
VTT_PWRGD#  
RST#  
3V66_1  
VDD_48MHz  
48MHz  
GND_3V66  
3V66_2  
PLL2  
GND_48MHz  
*FS0/48MHz  
*FS1/24_48MHz  
VDD_48MHz  
3V66_3  
24_48MHz  
RST#  
SCLK  
2
SDATA  
SDATA  
SCLK  
SMBus  
Logic  
SSOP-48  
Note:  
1. Signals marked with ‘*’ and “^” have internal pull-up and pull-down resistors respectively.  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
Document #: 38-07453 Rev. *B  
Revised November 19, 2003  

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