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CY25566_05 PDF预览

CY25566_05

更新时间: 2024-11-25 06:51:35
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟发生器
页数 文件大小 规格书
9页 104K
描述
Spread Spectrum Clock Generator

CY25566_05 数据手册

 浏览型号CY25566_05的Datasheet PDF文件第2页浏览型号CY25566_05的Datasheet PDF文件第3页浏览型号CY25566_05的Datasheet PDF文件第4页浏览型号CY25566_05的Datasheet PDF文件第5页浏览型号CY25566_05的Datasheet PDF文件第6页浏览型号CY25566_05的Datasheet PDF文件第7页 
CY25566  
Spread Spectrum Clock Generator  
• Center spread modulation  
• Low cycle-to cycle jitter  
• 16-pin SOIC package  
Features  
• 25- to 200-MHz operating frequency range  
• Wide range of spread selections (9)  
• Accepts clock or crystal inputs  
• Provides four clocks  
Applications  
• High-resolution VGA controllers  
• LCD panels and monitors  
• Printers and MFPs  
— SSCLK1a  
— SSCLK1b  
— SSCLK2  
Benefits  
— REFOUT  
• Peak EMI reduction by 8 to 16 dB  
• Fast time to market  
Cost reduction  
• Low-power dissipation  
3.3V = 70 mW (typical @ 40 MHz, no load)  
Pin Configuration  
Block Diagram  
REFOFF  
2
300K  
XIN/CLKIN  
REFOFF  
REFOUT  
VDD  
1
2
3
4
5
6
7
8
16 XOUT  
15 SSCLK2  
14 VSS  
13 S0  
3
REFOUT  
REFERENCE  
DIVIDER  
Xin/  
CLK  
1
Loop  
Filter  
PD  
CP  
VSS  
12 S1  
Xout  
16  
MODULATION  
CONTROL  
FEEDBACK  
DIVIDER  
vco  
S2  
11 VSS  
10 SSCC  
S3  
SSCLK1a  
9
SSCLK1b  
VDD  
VSS  
4
INPUT  
DECODER  
LOGIC  
DIVIDER  
&
MUX  
8 SSCLK1a  
9 SSCLK1b  
15 SSCLK2  
5
VDD  
VDD  
20 K  
20 K  
11  
14  
VSS  
VSS  
/2  
RANGE  
CONTROL  
20 K  
VSS  
20 K  
VSS  
6
13  
12  
S1 S0  
7
10  
SSCC  
S2 S3  
Cypress Semiconductor Corporation  
Document #: 38-07429 Rev. *B  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
Revised October 26, 2005  

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