CY25245

更新时间： 2024-09-30 09:41:27

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
11页	233K
描述
Frequency-multiplying, Peak-reducing EMI Solution

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CY25245 数据手册

CY25245

Frequency-multiplying, Peak-reducing

EMI Solution

Features

Key Specifications

• Cypress PREMIS™ SMARTSPREAD™ family offering

Supply voltages: .......................................V_DD= 3.3V ± 0.3V

or V_DD= 5V ± 10%

• Generates an electromagnetic interference (EMI)

optimized clocking signal at the output

Frequency range:............................ 13 MHz ≤ F_in≤ 166 MHz

Cycle-to-cycle jitter: ......................................... 250 ps (max)

Output duty cycle: ................................ 40/60% (worst case)

• Selectable output frequency range

• Single 1.25%, 2.5%, 5%, or 10% down or center spread

output

• Integrated loop filter components

• Operates with a 3.3 or 5V supply

• Low power CMOS design

• Available in 20-pin Small Shrunk Outline Package

(SSOP)

Pin Configuration^{[1, 2]}

Simplified Block Diagram

3.3V or 5.0V

SSOP

AVDD

MW0^

SDATA

OR1^

SCLK

GND

REFOUT

VDD

GND

IR1*

IR2*

SSOUT

MW1*

GND

XTAL

Input

Spread Spectrum

Output

(EMI suppressed)

CY25245

SDATA

SCLK

Serial Interface

3.3V or 5.0V

VDD

MW2^

OR2*

SSON#^

Oscillator or

Reference Input

Spread Spectrum

CY25245

Output

SDATA

SCLK

(EMI suppressed)

Serial Interface

Notes:

1. Pins marked with ^ are internal pull-down resistors with weak 250 kΩ.

2. Pins marked with * are internal pull-up resistors with weak 80 kΩ.

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose, CA 95134

•

408-943-2600

Document #: 38-07124 Rev. *B

RevisedFebruary2, 2005

12 3 4 5 6 7...11

中文翻译

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