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CY25100SCF

更新时间: 2024-09-28 22:40:23
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟发生器
页数 文件大小 规格书
11页 280K
描述
Field- and Factory-Programmable Spread Spectrum Clock Generator for EMI Reduction

CY25100SCF 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:0.150 INCH, MS-012, SOIC-8
针数:8Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.25JESD-30 代码:R-PDSO-G8
JESD-609代码:e0长度:4.889 mm
湿度敏感等级:3端子数量:8
最高工作温度:70 °C最低工作温度:
最大输出时钟频率:200 MHz封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):220电源:3.3 V
主时钟/晶体标称频率:166 MHz认证状态:Not Qualified
座面最大高度:1.727 mm子类别:Clock Generators
最大压摆率:35 mA最大供电电压:3.45 V
最小供电电压:3.13 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.8985 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER

CY25100SCF 数据手册

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CY25100  
Field- and Factory-Programmable Spread Spectrum  
Clock Generator for EMI Reduction  
Benefits  
Features  
• Wide operating output (SSCLK) frequency range  
— 3–200 MHz  
• Services most PC peripherals, networking, and consumer  
applications.  
• Provides wide range of spread percentages for maximum  
electromagnetic interference (EMI) reduction, to meet  
regulatory agency electromagnetic compliance (EMC)  
requirements. Reduces development and manufacturing  
costs and time-to-market.  
• Programmable spread spectrum with nominal 31.5-kHz  
modulation frequency  
— Center spread: ±0.25% to ±2.5%  
— Down spread: –0.5% to –5.0%  
• Input frequency range  
• Eliminates the need for expensive and difficult to use  
higher-order crystals.  
— External crystal: 8–30 MHz fundamental crystals  
— External reference: 8–166 MHz Clock  
• Integrated phase-locked loop (PLL)  
• Field-programmable  
— CY25100SCF and CY25100SIF, 8-pin SOIC  
— CY25100ZCF and CY25100ZIF, 8-pin TSSOP  
• Programmable crystal load capacitor tuning array  
• Low cycle-to-cycle jitter  
• Internal PLL to generate up to 200-MHz output. Able to  
generate custom frequencies from an external crystal or a  
driven source.  
• In-house programming of samples and prototype quantities  
is available using the CY3672 programming kit and  
CY3690 (TSSOP) or CY3691 (SOIC) socket adapter.  
Production quantities are available through Cypress’s  
value-added distribution partners or by using third-party  
programmers from BP Microsystems, HiLo Systems, and  
others.  
• 3.3V operation  
• Enables fine-tuning of output clock frequency by adjusting  
CLoad of the crystal. Eliminates the need for external CLoad  
capacitors.  
• Commercial and Industrial operation  
• Spread Spectrum On/Off function  
• Power-down or Output Enable function  
• Suitable for most PC, consumer, and networking applica-  
tions  
• Application compatibility in standard and low-power  
systems  
• Provides ability to enable or disable spread spectrum with  
an external pin.  
• Enables low-power state or output clocks to High-Z state.  
Logic Block Diagram  
Pin Configuration  
CY25100  
8-pin SOIC/TSSOP  
RFB  
PLL  
with  
3
MODULATION  
CONTROL  
1
2
VDD  
8
SSON#  
SSCLK  
XIN  
CXIN  
6
7
XOUT  
OUTPUT  
DIVIDERS  
and  
PROGRAMMABLE  
CONFIGURATION  
2
REFCLK  
XOUT  
3
XIN/CLKIN  
PD#/OE  
REFCLK 6  
VSS 5  
MUX  
CXOUT  
7
4
4
SSCLK  
PD# or OE  
8
SSON#  
1
5
VDD  
VSS  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose, CA 95134  
408-943-2600  
Document #: 38-07499 Rev. *D  
Revised March 24, 2004  

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