CY25100
Field and Factory-Programmable Spread Spectrum
Clock Generator for EMI Reduction
Features
Benefits
■ Wide operating output (SSCLK) frequency range
❐ 3–200 MHz
■ Services most PC peripherals, networking, and consumer
applications.
■ Provides wide range of spread percentages for maximum
electromagnetic interference (EMI) reduction, to meet
regulatory agency electromagnetic compliance (EMC) require-
ments. Reduces development and manufacturing costs and
time-to-market.
■ Programmable spread spectrum with nominal 31.5-kHz
modulation frequency
❐ Center spread: ±0.25% to ±2.5%
❐ Down spread: –0.5% to –5.0%
■ Input frequency range
❐ External crystal: 8–30 MHz fundamental crystals
❐ External reference: 8–166 MHz Clock
■ Eliminates the need for expensive and difficult to use
higher-order crystals.
■ InternalPLLtogenerateupto200MHzoutput.Abletogenerate
custom frequencies from an external crystal or a driven source.
■ Integrated phase-locked loop (PLL)
■ Field-programmable
❐ CY25100SCF and CY25100SIF, 8-pin SOIC
❐ CY25100ZCF and CY25100ZIF, 8-pin TSSOP
■ In-house programming of samples and prototype quantities is
available using the CY3672 programming kit and
CY3690 (TSSOP) or CY3691 (SOIC) socket adapter.
Production quantities are available through Cypress’s
value-added distribution partners or by using third-party
programmers from BP Microsystems, HiLo Systems, and
others.
■ Programmable crystal load capacitor tuning array
■ Low cycle-to-cycle jitter
■ 3.3V operation
■ Enables fine-tuning of output clock frequency by adjusting
■ Commercial and Industrial operation
■ Spread Spectrum On/Off function
■ Power down or Output Enable function
CLoad of the crystal. Eliminates the need for external CLoad
capacitors.
■ Suitable for most PC, consumer, and networking applications
■ Application compatibility in standard and low-power systems
■ Provides ability to enable or disable spread spectrum with an
external pin.
■ Enables low-power state or output clocks to High-Z state.
Logic Block Diagram
RFB
PLL
with
MODULATION
CONTROL
3
XIN
CXIN
6
OUTPUT
DIVIDERS
and
PROGRAMMABLE
CONFIGURATION
2
REFCLK
XOUT
CXOUT
MUX
7
4
SSCLK
PD# or OE
8
SSON#
1
5
VDD
VSS
Cypress Semiconductor Corporation
Document #: 38-07499 Rev. *E
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised June 13, 2008
[+] Feedback