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CY24210SC-7T PDF预览

CY24210SC-7T

更新时间: 2024-11-21 19:05:59
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
5页 87K
描述
Clock Generator, 100MHz, CMOS, PDSO8, 0.150 INCH, SOIC-8

CY24210SC-7T 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:8
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.84
JESD-30 代码:R-PDSO-G8长度:4.9 mm
端子数量:8最高工作温度:70 °C
最低工作温度:最大输出时钟频率:100 MHz
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
主时钟/晶体标称频率:14.31818 MHz认证状态:Not Qualified
座面最大高度:1.7272 mm最大供电电压:3.47 V
最小供电电压:3.14 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:3.9 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

CY24210SC-7T 数据手册

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CY24210  
100-MHz Clock Generator with Spread Spectrum  
Features  
Benefits  
• Integrated phase-locked loop (PLL)  
• Low-jitter, high-accuracy outputs  
• Spread Spectrum  
High-performance PLL tailored for multimedia applications  
Meets critical timing requirements in complex system designs  
Spread Spectrum outputs for EMI reduction  
Enables application compatibility  
• 3.3V operation  
Part Number Outputs  
CY24210  
Input Frequency Range  
Output Frequencies  
3
14.31818 MHz  
Two copies of 100 MHz, 14.31818 MHz  
Logic Block Diagram  
REF  
XIN  
OSC  
Q
Φ
CLK2  
CLK1  
OUTPUT  
DIVIDERS  
SPREAD  
SPECTRUM  
XOUT  
VCO  
P
PLL  
SSON  
VSS  
VDD  
Spread Spectrum Profiles  
Pin Configuration  
Part Numbers  
CY24210SC-3  
CY24210SC-4  
CY24210SC-5  
CY24210SC-6  
CY24210SC-7  
Center Spread Percentage  
+ 1.875%  
CY24210  
8-pin SOIC  
+ 1.375%  
+ 2.375%  
1
2
3
4
XOUT  
8
7
6
5
XIN  
CLK1  
CLK2  
VDD  
SSON  
VSS  
+ 2.875%  
+ 3.375%  
REF  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose, CA 95134  
408-943-2600  
Document #: 38-07361 Rev. *A  
Revised December 5, 2002  

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