Datasheet > CY24210

CY24210

更新时间： 2024-02-09 09:15:38

品牌	Logo	应用领域
其他 - ETC		时钟
页数	文件大小	规格书
5页	90K
描述
Clocks and Buffers

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中文翻译

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数据手册

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CY24210 数据手册

CY24210

100-MHz Clock Generator with Spread Spectrum

Features

Benefits

• Integrated phase-locked loop (PLL)

• Low-jitter, high-accuracy outputs

• Spread Spectrum

High-performance PLL tailored for multimedia applications

Meets critical timing requirements in complex system designs

Spread Spectrum outputs for EMI reduction

Enables application compatibility

• 3.3V operation

Part Number Outputs

CY24210

Input Frequency Range

Output Frequencies

14.31818 MHz

Two copies of 100 MHz, 14.31818 MHz

Logic Block Diagram

REF

XIN

OSC

CLK2

CLK1

OUTPUT

DIVIDERS

SPREAD

SPECTRUM

XOUT

VCO

PLL

SSON

VSS

VDD

Spread Spectrum Profiles

Pin Configuration

Part Numbers

CY24210SC-3

CY24210SC-4

CY24210SC-5

CY24210SC-6

CY24210SC-7

Center Spread Percentage

+ 1.875%

CY24210

8-pin SOIC

+ 1.375%

+ 2.375%

XOUT

XIN

CLK1

CLK2

VDD

SSON

VSS

+ 2.875%

+ 3.375%

REF

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose, CA 95134

•

408-943-2600

Document #: 38-07361 Rev. *A

Revised December 5, 2002

12 3 4 5

中文翻译

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