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CY2302SXI-1 PDF预览

CY2302SXI-1

更新时间: 2024-11-24 14:56:11
品牌 Logo 应用领域
英飞凌 - INFINEON PC驱动光电二极管逻辑集成电路
页数 文件大小 规格书
12页 1183K
描述
3.3V Zero Delay Buffer

CY2302SXI-1 数据手册

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CY2302  
Frequency Multiplier and  
Zero Delay Buffer  
Frequency Multiplier and Zero Delay Buffer  
Features  
Configuration Options  
90 ps typical jitter OUT2  
FBIN  
OUT1  
OUT1  
OUT1  
OUT1  
OUT2  
OUT2  
OUT2  
OUT2  
FS0  
0
FS1  
0
OUT1  
2 × REF  
4 × REF  
REF  
OUT2  
REF  
200 ps typical jitter OUT1  
65 ps typical output-to-output skew  
90 ps typical propagation delay  
Voltage range: 3.3 V ± 5%, or 5 V ± 10%  
Output frequency range: 5 MHz to 133 MHz  
Two outputs  
1
0
2 × REF  
REF/2  
0
1
1
1
8 × REF  
4 × REF  
8 × REF  
2 × REF  
16 × REF  
4 × REF  
2 × REF  
4 × REF  
REF  
0
0
1
0
Configuration options allow various multiplications of the  
reference frequency – refer to Configuration Options to  
determine the specific option which meets your multiplication  
needs  
0
1
1
1
8 × REF  
Functional Description  
Available in 8-pin SOIC package  
For a complete list of related documentation, click here.  
Logic Block Diagram  
External feedback connection to  
OUT1 or OUT2, not both  
FBIN  
FS0  
÷Q  
FS1  
Phase  
Detector  
Charge  
Pump  
IN  
Reference  
Input  
Loop  
Filter  
Output  
OUT1  
Buffer  
VCO  
Output  
OUT2  
÷2  
Buffer  
Cypress Semiconductor Corporation  
Document Number: 38-07154 Rev. *H  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised May 18, 2016  

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