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CY2285PVC-2T PDF预览

CY2285PVC-2T

更新时间: 2024-11-26 09:53:39
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 光电二极管
页数 文件大小 规格书
9页 120K
描述
Processor Specific Clock Generator, 100MHz, CMOS, PDSO28, 0.210 INCH, SSOP-28

CY2285PVC-2T 数据手册

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CY2285  
100-MHz Pentium®II Clock Synthesizer/Driver  
with Spread Spectrum for Mobile PCs  
The CY2285 possesses power-down, CPU stop, and PCI stop  
pins for power management control. The signals are synchro-  
nized on-chip, and ensure glitch-free transitions on the out-  
Features  
Mixed 2.5V and 3.3V operation  
puts. When the CPU_STOP input is asserted, the CPU clock  
outputs are driven LOW. When the PCI_STOP input is assert-  
ed, the PCI clock outputs (except the free-running PCI clock)  
are driven LOW. When the PWR_DWN pin is asserted, the  
reference oscillator and PLLs are shut down, and all outputs  
are driven LOW.  
Complete clock solution for Pentium® II, and other sim-  
ilar processor-based motherboards  
— Two CPU clocks at 2.5V up to 100 MHz  
— Six synchronous PCI clocks, one free-running  
— Two 3.3V Reference clocks at 14.318 MHz  
— One 3.3V USB clock running at 48 MHz  
— One 3.3V USB/IO clock running at 48 MHz/24 MHz  
The CY2285-2 features an early PCI clock which leads the  
other PCI clocks by 1–4 ns. The CY2285-2 also features a  
DIV4 pin which allows for dynamic shifting of CPU and PCI  
clocks from the default frequency to the default/4.  
• Spread Spectrum clocking for EMI control  
• 1.5–4.0 ns delay between CPU and PCI clocks  
Power-down, CPU stop and PCI stop pins  
CY2285 Selector Guide  
Clock Outputs  
CY2285-1  
CY2285-2  
CY2285-3  
Low skew outputs, 175 ps between CPU clocks  
• Early PCI clock leads PCI by 1–4 ns (-2 option)  
• DIV4 allows dynamic shifting of CPU and PCI clocks  
from the default frequency to default/4 (-2 option)  
CPU (66,  
100 MHz)  
2
2
2
[1]  
[1, 2]  
[1]  
PCI (CPU/2,  
CPU/3 MHz)  
6
7
6
Factory-EPROM programmable output drive and slew  
rate for EMI customization  
Ref. (14.318 MHz)  
USB (48 MHz)  
2
1
1
2
1
1
1
1
• Available in space-saving 28-pin SSOP package  
Functional Description  
USB/IO (48  
MHz/24 MHz se-  
lectable)  
N/A  
The CY2285 is a clock synthesizer/driver for Pentium II, or  
other similar processor-based mobile PCs requiring up to  
100-MHz support. The CY2285 outputs two CPU clocks at  
2.5V. There are six PCI clocks, running at one-half or one-third  
the CPU clock frequency of 66.6 MHz and 100 MHz respec-  
tively. One of the PCI clocks is free-running. Additionally, the  
part outputs two 3.3V reference clocks at 14.318 MHz.  
CPU-PCI delay  
EPCI-PCI delay  
Spread Spectrum  
1.5–4.0 ns  
N/A  
1.5–4.0 ns  
1.0–4.0 ns  
–0.6%  
1.5–4.0 ns  
N/A  
–0.6%  
–0.6%  
Downspread Downspread Downspread  
The CY2285 provides incorporates the Intel®-defined spread  
spectrum features. It provides a –0.6% downspread on the  
CPU and PCI clocks, which can help reduce EMI in certain  
high-speed systems.  
Notes:  
1. One free-running PCI clock.  
2. One early PCI clock.  
SPREAD (-2,-3 option)  
Logic Block Diagram  
REF0/SPREAD  
REF0 (-2 option)  
DIV4  
REF1/SEL48  
REF1 (-2,-3 option)  
XTALIN  
14.318  
MHz  
OSC.  
VDDREF  
XTALOUT  
STOP  
LOGIC  
CPU  
PLL  
/4  
CPUCLK [0–1]  
VDDCPU  
Divider  
Delay  
PWR_DWN  
EPCICLK (-2 option)  
VDDPCI  
EPROM  
STOP  
LOGIC  
PCICLK [1-5]  
VDDPCI  
CPU_STOP  
PCI_STOP  
PCICLK_F  
VDDPCI  
SYS  
PLL  
USBCLK  
VDD48  
USB_IOCLK/TS (-1 option)  
USBCLK/SEL100/66 (-2 option)  
VDD48  
Intel and Pentium are registered trademarks of Intel Corporation.  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
May 18, 2000  

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