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CY2281PVC-11ST PDF预览

CY2281PVC-11ST

更新时间： 2024-11-25 19:22:59
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
9页 120K
描述
Processor Specific Clock Generator, 100MHz, CMOS, PDSO28, 0.210 INCH, SSOP-28

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中文翻译

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CY2281PVC-11ST 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：SSOP包装说明：SSOP,
针数：28Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.92JESD-30 代码：R-PDSO-G28
JESD-609代码：e0长度：10.2 mm
湿度敏感等级：1端子数量：28
最高工作温度：70 °C最低工作温度：
最大输出时钟频率：100 MHz封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH峰值回流温度（摄氏度）：NOT SPECIFIED
主时钟/晶体标称频率：14.318 MHz认证状态：Not Qualified
座面最大高度：2 mm最大供电电压：3.465 V
最小供电电压：3.135 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：TIN LEAD
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：5.3 mmuPs/uCs/外围集成电路类型：CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches：1

CY2281PVC-11ST 数据手册

 浏览型号CY2281PVC-11ST的Datasheet PDF文件第2页浏览型号CY2281PVC-11ST的Datasheet PDF文件第3页浏览型号CY2281PVC-11ST的Datasheet PDF文件第4页浏览型号CY2281PVC-11ST的Datasheet PDF文件第5页浏览型号CY2281PVC-11ST的Datasheet PDF文件第6页浏览型号CY2281PVC-11ST的Datasheet PDF文件第7页 
PRELIMINARY  
CY2281  
100MHz Pentium®II Clock Synthesizer/Driver  
with Spread Spectrum for Mobile PCs  
duce EMI in certain high-speed systems. A summary of clock  
outputs for both devices is shown below.  
Features  
Mixed 2.5V and 3.3V operation  
Complete clock solution for Pentium® II, and other sim-  
ilar processor-based motherboards  
•
•
The part possesses power-down, CPU stop, and PCI stop pins  
for power management control. The signals are synchronized  
on-chip, and ensure glitch-free transitions on the outputs.  
When the CPU_STOP input is asserted, the CPU clock out-  
puts are driven LOW. When the PCI_STOP input is asserted,  
the PCI clock outputs (except the free-running PCI clock) are  
driven LOW. When the PWR_DWN pin is asserted, the refer-  
ence oscillator and PLLs are shut down, and all outputs are  
driven LOW.  
— Two CPU clocks at 2.5V up to 100 MHz  
— Six synchronous PCI clocks, one free-running  
— One 3.3V Ref. clock at 14.318 MHz  
— One 3.3V USB clock at 48 MHz (-2S only)  
• Spread Spectrum clocking for EMI control (-11S, -2S)  
• 1.5–4.0 ns delay between CPU and PCI clocks  
Power-down, CPU stop and PCI stop pins  
The CY2281 clock outputs are designed for low EMI emis-  
sions. Controlled rise and fall times, unique output driver cir-  
cuits, and innovative circuit layout techniques enable the  
CY2281 to have lower EMI than clock devices from other man-  
ufacturers. Additionally, factory-EPROM programmable output  
drive and slew-rate control enable optimal configurations.  
•
•
•
Low skew outputs, 175 ps between CPU clocks  
≤
Factory-EPROM programmable output drive and slew  
rate for EMI customization  
• Available in space-saving 28-pin SSOP package  
CY2281 Selector Guide  
Functional Description  
Clock Outputs  
CPU (66, 100 MHz)  
PCI (CPU/2, CPU/3)  
REF (14.318 MHz)  
USB (48 MHz)  
-1  
-11S  
-2S  
The CY2281 is a clock synthesizer/driver for Pentium II, or  
other similar processor-based mobile PCs requiring up to 100  
MHz support. The CY2281 outputs two CPU clocks at 2.5V.  
There are six PCI clocks, running at one-half or one-third the  
CPU clock frequency of 66.6 MHz and 100 MHz respectively.  
One of the PCI clocks is free-running. Additionally, the part  
outputs one 3.3V reference clock at 14.318 MHz. The  
CY2281-2S also provides one 3.3V USB clock at 48 MHz.  
2
2
2
[1]  
[1]  
[1]  
6
6
6
1
1
1
1
N/A  
N/A  
CPU-PCI delay  
1.5–4.0 ns 1.5–4.0 ns 1.5–4.0 ns  
None –0.6% –0.6%  
Spread Spectrum  
The CY2281-11S and CY2281-2S incorporate the Intel®-de-  
fined spread spectrum feature. They provide a –0.6%  
downspread on the CPU and PCI clocks, which can help re-  
Note:  
1. One free-running PCI clock.  
Pin Configuration  
Logic Block Diagram  
28-Pin SSOP  
Top View  
CPU_STOP  
XTALIN  
1
2
3
4
28  
27  
26  
25  
24  
V
V
SS  
REF  
XTALOUT  
DDREF  
XTALIN  
14.318  
MHz  
OSC.  
V
SS  
REF  
V
VDDREF  
PCICLK_F  
PCICLK1  
XTALOUT  
DDCPU  
STOP  
LOGIC  
CPU  
PLL  
CPUCLK0  
CPUCLK1  
5
6
7
8
9
CPUCLK [0–1]  
VDDCPU  
V
DDPCI  
23  
22  
21  
Divider  
Delay  
PCICLK2  
PCICLK3  
V
SS  
PWR_DWN  
AV  
DD  
PCICLK_F  
VDDPCI  
V
DDPCI  
SEL  
(-1/-11S only)  
20  
19  
18  
17  
V
SS  
10  
PCICLK4  
PCICLK5  
PCI_STOP  
EPROM  
11  
12  
13  
14  
CPU_STOP  
STOP  
LOGIC  
PCI [1-5]  
VDDPCI  
V
SEL100  
PWR_DWN  
SS  
16  
15  
V
SEE CHART BELOW  
DDUSB  
V
SEL100  
SS  
SYS  
PLL  
USBCLK (-2S only)  
VDDUSB  
Option  
Pin 16  
-1,-11S  
SEL  
PCI_STOP  
-2S  
USBCLK  
Intel and Pentium are registered trademarks of Intel Corporation.  
Cypress Semiconductor Corporation  
•
3901 North First Street  
•
San Jose  
•
CA 95134  
•
408-943-2600  
July 21, 1999  
1234567...9

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CY2282SC-11ST CYPRESS

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 		Processor Specific Clock Generator, 100MHz, CMOS, PDSO28, 0.300 INCH, PLASTIC, SOIC-28
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 		Processor Specific Clock Generator, 100MHz, CMOS, PDSO48, SSOP-48
CY2283PVC-2 CYPRESS

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