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CY2252PVC-1

更新时间： 2024-11-17 19:42:03
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
7页 83K
描述
Processor Specific Clock Generator, 66MHz, MOS, PDSO28, SSOP-28

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CY2252PVC-1 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：SSOP包装说明：SSOP-28
针数：28Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.84JESD-30 代码：R-PDSO-G28
JESD-609代码：e0长度：10.2 mm
端子数量：28最高工作温度：70 °C
最低工作温度：最大输出时钟频率：66 MHz
封装主体材料：PLASTIC/EPOXY封装代码：SSOP
封装等效代码：SSOP28,.3封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH峰值回流温度（摄氏度）：NOT SPECIFIED
电源：3.3 V主时钟/晶体标称频率：14.318 MHz
认证状态：Not Qualified座面最大高度：2 mm
子类别：Clock Generators最大压摆率：90 mA
最大供电电压：3.465 V最小供电电压：3.135 V
标称供电电压：3.3 V表面贴装：YES
技术：MOS温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：5.3 mm
uPs/uCs/外围集成电路类型：CLOCK GENERATOR, PROCESSOR SPECIFICBase Number Matches：1

CY2252PVC-1 数据手册

 浏览型号CY2252PVC-1的Datasheet PDF文件第2页浏览型号CY2252PVC-1的Datasheet PDF文件第3页浏览型号CY2252PVC-1的Datasheet PDF文件第4页浏览型号CY2252PVC-1的Datasheet PDF文件第5页浏览型号CY2252PVC-1的Datasheet PDF文件第6页浏览型号CY2252PVC-1的Datasheet PDF文件第7页 
1CY2252  
fax id: 3522  
CY2252  
Mobile Pentium™ Processor  
Compatible Clock Synthesizer/Driver  
• Packaged in 28-pin SSOP for minimum board space  
• 3.3V operation  
• Internal pull-up resistors on S0,S1, and OE inputs  
Features  
• Multiple clock outputs to meet requirements of mobile  
systems using Pentium™ processors  
— Five CPU clocks @ 66.66 MHz, 60.0 MHz, 50.0 MHz  
or 33.33 MHz pin selectable  
Functional Description  
The CY2252 is a Clock Synthesizer/Driver chip for an Intel®  
Pentium processor based PC. It is optimized to address the  
needs of mobile Pentium designs with Doze mode support,  
and early PCI clocks; provides two “early” PCI clocks to com-  
pensate for clock delays caused by long traces in docking sta-  
tion designs; and has low-skew outputs (< 250 ps between the  
CPU clocks, < 250 ps between the PCI clocks). In addition, the  
CY2252 CPU clock outputs have less than 200 ps cycle-to-cy-  
cle jitter. Finally, both the PCI and CPU clock outputs meet the  
1V/ns slew rate requirement of Pentium processor based sys-  
tems.  
— Six PCI clocks at 33.33 MHz, 30.0 MHz, 25MHzor16.6  
MHz. Includes two Early PCI clockswhich lead other  
PCI and CPU clocks by 3.5ns typically  
— One I/O clock @ 24 MHz  
— Two Ref. clocks @ 14.318 MHz  
— Ref. 14.318 MHz Xtal oscillator input  
• Doze Mode Support (33 MHz CPU clock)  
• Early PCI clocks are ideal for docking station design  
• CPU clock jitter < 200 ps cycle-to-cycle  
• Low skew outputs  
The CY2252 accepts a 14.318-MHz reference crystal as its  
input. The chip has two PLLs, one of which generates the CPU  
and PCI clocks while the other generates a 24 MHz I/O clock.  
The latter can drive a Floppy Disk Controller and Super I/O™  
or Ultra I/O™ devices. The CY2252 runs off a 3.3V supply.  
— < 250 ps between CPU clocks (CPUCLK)  
— < 250 ps between PCI clocks (PCICLK)  
— < 500 ps between CPU and PCI clocks  
LogicBlockDiagram  
PinConfiguration  
REF0(14.318MHz)  
Top View  
REF1(14.318MHz)  
SSOP  
SYS  
PLL  
IOCLK(24MHz)  
V
REF0  
REF1  
1
2
3
4
28  
27  
26  
25  
DD  
XTALIN  
XTALOUT  
XTALIN  
14.318  
MHz  
OSC.  
V
DD  
V
SS  
CPUCLK4  
IOCLK  
XTALOUT  
OE  
5
24  
23  
22  
21  
20  
19  
18  
17  
CPU  
PLL  
DELAY  
CPUCLK0  
CPUCLK1  
V
SS  
6
CPUCLK0  
CPUCLK1  
CPUCLK2  
CPUCLK3  
EPCICLK1  
EPCICLK0  
7
V
DD  
8
CPUCLK2  
CPUCLK3  
V
DD  
9
PCICLK3  
PCICLK2  
10  
11  
12  
ROM  
V
SS  
S1  
S0  
V
SS  
S0  
S1  
CPUCLK4  
PCICLK1  
PCICLK0  
13  
14  
16  
15  
V
DD  
³÷2  
2252–2  
DELAY  
PCICLK0  
PCICLK1  
PCICLK2  
PCICLK3  
EPCICLK0  
EPCICLK1  
OE  
2252–1  
Intel is a registered trademark of Intel Corporation.  
Pentium is a trademark of Intel Corporation.  
Super I/O is a trademark of National Semiconductor.  
Ultra I/O is a trademark of Standard Microsystems Corp.  
Cypress Semiconductor Corporation  
•
3901 North First Street  
•
San Jose  
•
CA 95134  
•
408-943-2600  
December 1995 – Revised June 12, 1997  
1234567

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