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CY2213

更新时间: 2024-11-25 22:10:35
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟发生器
页数 文件大小 规格书
10页 104K
描述
High-Frequency Programmable PECL Clock Generator

CY2213 数据手册

 浏览型号CY2213的Datasheet PDF文件第2页浏览型号CY2213的Datasheet PDF文件第3页浏览型号CY2213的Datasheet PDF文件第4页浏览型号CY2213的Datasheet PDF文件第5页浏览型号CY2213的Datasheet PDF文件第6页浏览型号CY2213的Datasheet PDF文件第7页 
CY2213  
High-Frequency Programmable PECL  
Clock Generator  
1CY2213  
Features  
Benefits  
High-accuracy clock generation  
• Jitter peak-peak (TYPICAL) = 35 ps  
• LVPECL output  
One pair of differential output drivers  
• Default Select option  
• Serially-configurable multiply ratios  
• Output edge-rate control  
• 16-pin TSSOP  
Phase-locked loop (PLL) multiplier select  
Eight-bit feedback counter and six-bit reference counter for high accuracy  
Minimize electromagnetic interference (EMI)  
Industry-standard, low-cost package saves on board space  
• High frequency  
125- to 400-MHz (-1) or to 500-MHz (-2) extended output range for high-speed  
applications  
• 3.3V operation  
Enables application compatibility  
Block Diagram  
XIN  
Xtal  
Oscillator  
CLK  
XOUT  
PLL  
xM  
CLKB  
OE  
S
SER CLK  
SER DATA  
Pin Configuration  
CY2213  
16-pin TSSOP  
VDDX  
VSSX  
XOUT  
XIN  
S
1
2
3
4
16  
15  
14  
VDD  
VSS  
CLK  
CLKB  
VSS  
13  
12  
11  
10  
VDD  
5
6
7
8
OE  
VSS  
VDD  
SER DATA  
SER CLK  
9
Cypress Semiconductor Corporation  
Document #: 38-07263 Rev. *E  
3901 North First Street  
San Jose, CA 95134  
408-943-2600  
Revised May 23, 2003  

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