Datasheet > CY14V101Q3-SFXIT

CY14V101Q3-SFXIT

更新时间： 2024-10-01 11:12:11

品牌	Logo	应用领域
英飞凌 - INFINEON		静态存储器
页数	文件大小	规格书
24页	1075K
描述
nvSRAM (non-volatile SRAM)

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中文翻译

获取价格

数据手册

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CY14V101Q3-SFXIT 数据手册

CY14V101Q3

1 Mbit (128 K × 8) Serial SPI nvSRAM

■ Low power consumption

❐ Core V_CC= 3.0 V to 3.6 V; I/O V_CCQ= 1.65 V to 1.95 V

❐ Average active current of 10 mA at 30 MHz operation

Features

■ 1-Mbit nonvolatile static random access memory (nvSRAM)

❐ Internally organized as 128 K × 8

■ Industry standard configurations

❐ Industrial temperature

❐ 16-pin small outline integrated circuit (SOIC) package

❐ Restriction of hazardous substances (RoHS) compliant

❐ STORE to QuantumTrap nonvolatile elements initiated

automatically on power-down (AutoStore) or by user using

HSB pin (Hardware STORE) or SPI instruction (Software

STORE)

❐ RECALL to SRAM initiated on power-up

(Power-Up RECALL) or by SPI instruction

(Software RECALL)

Functional Overview

The Cypress CY14V101Q3 combines a 1 Mbit nvSRAM with a

nonvolatile element in each memory cell with serial SPI interface.

The memory is organized as 128 K words of 8 bits each. The

embedded nonvolatile elements incorporate the QuantumTrap

technology, creating the world’s most reliable nonvolatile

memory. The SRAM provides infinite read and write cycles, while

the QuantumTrap cell provides highly reliable nonvolatile

storage of data. Data transfers from SRAM to the nonvolatile

elements (STORE operation) takes place automatically at

power-down. On power-up, data is restored to the SRAM from

the nonvolatile memory (RECALL operation). Both STORE and

RECALL operations can also be initiated by the user through SPI

instruction.

❐ Automatic STORE on power-down with a small capacitor

■ High reliability

❐ Infinite read, write, and RECALL cycles

❐ 1 million STORE cycles to QuantumTrap

❐ Data retention: 20 years

■ High speed serial peripheral interface (SPI)

❐ 30 MHz clock rate

❐ Supports SPI mode 0 (0,0) and mode 3 (1,1)

■ Write protection

❐ Hardware protection using Write Protect (WP) pin

❐ Software protection using Write Disable instruction

❐ Software block protection for 1/4,1/2, or entire array

For a complete list of related documentation, click here.

V_CCV_CCQ

V_CAP

Logic Block Diagram

Quantum Trap

128 K X 8

Power Control

SCK

Instruction decode

Write protect

Control logic

STORE/RECALL

Control

STORE

HSB

SRAM ARRAY

HOLD

RECALL

128 K X 8

Instruction

D0-D7

A0-A16

Address

Decoder

Data I/O register

Status register

Cypress Semiconductor Corporation

Document #: 001-67191 Rev. *E

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised November 13, 2014

12 3 4 5 6 7...24

中文翻译

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与CY14V101Q3-SFXIT相关器件

型号	品牌	获取价格	描述	数据表
CY14V101QS-BK108XI	INFINEON	获取价格	nvSRAM (non-volatile SRAM)
CY14V101QS-BK108XITR	CYPRESS	获取价格	Non-Volatile SRAM, 128KX8, CMOS, PBGA24, LEAD FREE, FBGA-24
CY14V101QS-BK108XQ	CYPRESS	获取价格	Non-Volatile SRAM, 128KX8, CMOS, PBGA24, FBGA-24
CY14V101QS-BK108XQ	INFINEON	获取价格	nvSRAM (non-volatile SRAM)
CY14V101QS-BK108XQTR	CYPRESS	获取价格	Non-Volatile SRAM, 128KX8, CMOS, PBGA24, LEAD FREE, FBGA-24
CY14V101QS-SE108XI	CYPRESS	获取价格	Non-Volatile SRAM, 128KX8, CMOS, PDSO16, SOIC-16
CY14V101QS-SE108XI	INFINEON	获取价格	nvSRAM (non-volatile SRAM)
CY14V101QS-SE108XIT	CYPRESS	获取价格	Non-Volatile SRAM, 128KX8, CMOS, PDSO16, SOIC-16
CY14V101QS-SE108XQ	CYPRESS	获取价格	Non-Volatile SRAM, 128KX8, CMOS, PDSO16, SOIC-16
CY14V101QS-SE108XQ	INFINEON	获取价格	nvSRAM (non-volatile SRAM)

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