Datasheet > 存储 > SRAM> CY14MB064Q2B

CY14MB064Q2B

更新时间： 2024-11-18 12:27:51

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		静态存储器
页数	文件大小	规格书
28页	913K
描述
64-Kbit (8 K x 8) SPI nvSRAM

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中文翻译

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数据手册

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CY14MB064Q2B 数据手册

CY14MB064Q1B/CY14MB064Q2B

CY14ME064Q1B/CY14ME064Q2B

64-Kbit (8 K × 8) SPI nvSRAM

64-Kbit (8

K × 8) SPI nvSRAM

■ Industry standard configurations

❐ Operating voltages:

Features

■ 64-Kbit nonvolatile static random access memory (nvSRAM)

internally organized as 8 K × 8

❐ STORE to QuantumTrap nonvolatile elements initiated

automatically on power-down (AutoStore) or by using SPI

instruction (Software STORE)

• CY14MB064Q1B/CY14MB064Q2B: V_CC= 2.7 V to 3.6 V

• CY14ME064Q1B/CY14ME064Q2B: V_CC= 4.5 V to 5.5 V

❐ Industrial temperature

❐ 8-pin small outline integrated circuit (SOIC) package

❐ Restriction of hazardous substances (RoHS) compliant

❐ RECALL to SRAM initiated on power-up (Power-Up

RECALL) or by SPI instruction (Software RECALL)

❐ Support automatic STORE on power-down with a small

capacitor (except for CY14MX064Q1B)

Functional Overview

The Cypress CY14MX064Q combines a 64 Kbit nvSRAM with a

nonvolatile element in each memory cell with serial SPI interface.

The memory is organized as 8 K words of 8 bits each. The

embedded nonvolatile elements incorporate the QuantumTrap

technology, creating the world’s most reliable nonvolatile

memory. The SRAM provides infinite read and write cycles, while

the QuantumTrap cells provide highly reliable nonvolatile

storage of data. Data transfers from SRAM to the nonvolatile

elements (STORE operation) takes place automatically at

power-down (except for CY14MX064Q1B). On power-up, data

is restored to the SRAM from the nonvolatile memory (RECALL

operation). You can also initiate the STORE and RECALL

operations through SPI instruction.

■ High reliability

❐ Infinite read, write, and RECALL cycles

❐ 1million STORE cycles to QuantumTrap

❐ Data retention: 20 years at 85 C

■ High speed serial peripheral interface (SPI)

❐ 40-MHz clock rate SPI write and read with zero cycle delay

❐ Supports SPI mode 0 (0,0) and mode 3 (1,1)

■ SPI access to special functions

❐ Nonvolatile STORE/RECALL

❐ 8-byte serial number

❐ Manufacturer ID and Product ID

❐ Sleep mode

Configuration

Feature

AutoStore

CY14MX064Q1B CY14MX064Q2B

■ Write protection

Yes

❐ Hardware protection using Write Protect (WP) pin

❐ Software protection using Write Disable instruction

❐ Software block protection for 1/4, 1/2, or entire array

Software STORE

Yes

■ Low power consumption

❐ Average active current of 3 mA at 40 MHz operation

❐ Average standby mode current of 120 A

❐ Sleep mode current of 8 A

Logic Block Diagram

Serial Number

8 x 8

Manufacturer ID /

Status Register

Product ID

QuantumTrap

8 K x 8

WRSR/RDSR/WREN

RDSN/WRSN/RDID

READ/WRITE

STORE/RECALL/ASENB/ASDISB

STORE

SRAM

8 K x 8

Memory

RECALL

SPI Control Logic

Write Protection

Data & Address

Control

SCK

Instruction decoder

V_CC

V_CAP

SLEEP

Power Control

Block

Cypress Semiconductor Corporation

Document Number: 001-70382 Rev. *H

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised May 6, 2013

12 3 4 5 6 7...28

中文翻译

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与CY14MB064Q2B相关器件

型号	品牌	获取价格	描述	数据表
CY14MB064Q2B-SXI	CYPRESS	获取价格	64-Kbit (8 K Ã 8) SPI nvSRAM
CY14MB064Q2B-SXIT	CYPRESS	获取价格	64-Kbit (8 K Ã 8) SPI nvSRAM
CY14MB256J	CYPRESS	获取价格	256-Kbit (32 K x 8) Serial (I2C) nvSRAM
CY14MB256J1-SXI	CYPRESS	获取价格	256-Kbit (32 K Ã 8) Serial (I2C) nvSRAM
CY14MB256J1-SXIT	CYPRESS	获取价格	256-Kbit (32 K Ã 8) Serial (I2C) nvSRAM
CY14MB256J2-SXI	CYPRESS	获取价格	256-Kbit (32 K Ã 8) Serial (I2C) nvSRAM
CY14MB256J2-SXIT	CYPRESS	获取价格	256-Kbit (32 K Ã 8) Serial (I2C) nvSRAM
CY14MC256J	CYPRESS	获取价格	256-Kbit (32 K x 8) Serial (I2C) nvSRAM
CY14MC256J_12	CYPRESS	获取价格	256-Kbit (32 K Ã 8) Serial (I2C) nvSRAM
CY14MC256J_13	CYPRESS	获取价格	256-Kbit (32 K x 8) Serial (I2C) nvSRAM

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