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CY14MB064J1-SXIT PDF预览

CY14MB064J1-SXIT

更新时间： 2024-11-18 09:41:07
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 存储内存集成电路静态存储器光电二极管
页数 文件大小 规格书
31页 2004K
描述
64-Kbit (8 K x 8) Serial (I2C) nvSRAM Nonvolatile STORE/RECALL

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中文翻译

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CY14MB064J1-SXIT 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP, SOP8,.25针数：8
Reach Compliance Code：compliantECCN代码：3A991.B.2.A
HTS代码：8542.32.00.41风险等级：5.82
Is Samacsys：NJESD-30 代码：R-PDSO-G8
JESD-609代码：e4长度：4.889 mm
内存密度：65536 bit内存集成电路类型：NON-VOLATILE SRAM
内存宽度：8湿度敏感等级：3
功能数量：1端子数量：8
字数：8192 words字数代码：8000
工作模式：SYNCHRONOUS最高工作温度：85 °C
最低工作温度：-40 °C组织：8KX8
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP8,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE并行/串行：SERIAL
峰值回流温度（摄氏度）：260电源：3 V
认证状态：Not Qualified座面最大高度：1.727 mm
最大待机电流：0.00015 A子类别：SRAMs
最大压摆率：0.003 mA最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.7 V标称供电电压 (Vsup)：3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：20
宽度：3.8985 mmBase Number Matches：1

CY14MB064J1-SXIT 数据手册

 浏览型号CY14MB064J1-SXIT的Datasheet PDF文件第2页浏览型号CY14MB064J1-SXIT的Datasheet PDF文件第3页浏览型号CY14MB064J1-SXIT的Datasheet PDF文件第4页浏览型号CY14MB064J1-SXIT的Datasheet PDF文件第5页浏览型号CY14MB064J1-SXIT的Datasheet PDF文件第6页浏览型号CY14MB064J1-SXIT的Datasheet PDF文件第7页 
CY14MB064J  
CY14ME064J  
64-Kbit (8 K × 8) Serial (I2C) nvSRAM  
64-Kbit (8  
K × 8) Serial (I2C) nvSRAM  
■ Industry standard configurations  
❐ Operating voltages:  
Features  
■ 64-Kbit nonvolatile static random access memory (nvSRAM)  
❐ Internally organized as 8 K × 8  
❐ STORE to QuantumTrap nonvolatile elements initiated  
automatically on power-down (AutoStore) or by using I2C  
command (SoftwareSTORE) orHSBpin(HardwareSTORE)  
❐ RECALL to SRAM initiated on power-up (Power-Up  
RECALL) or by I2C command (Software RECALL)  
❐ Automatic STORE on power-down with a small capacitor  
(except for CY14MX064J1)  
• CY14MB064J: VCC = 2.7 V to 3.6 V  
• CY14ME064J: VCC = 4.5 V to 5.5 V  
❐ Industrial temperature  
❐ 8- and 16-pin small outline integrated circuit (SOIC) package  
❐ Restriction of hazardous substances (RoHS) compliant  
Overview  
The Cypress CY14MB064J/CY14ME064J combines a 64-Kbit  
nvSRAM[1] with a nonvolatile element in each memory cell. The  
memory is organized as 8 K words of 8 bits each. The embedded  
nonvolatile elements incorporate the QuantumTrap technology,  
creating the world’s most reliable nonvolatile memory. The  
SRAM provides infinite read and write cycles, while the  
QuantumTrap cells provide highly reliable nonvolatile storage of  
data. Data transfers from SRAM to the nonvolatile elements  
(STORE operation) takes place automatically at power-down  
(except for CY14MX064J1). On power-up, data is restored to the  
SRAM from the nonvolatile memory (RECALL operation). The  
STORE and RECALL operations can also be initiated by the user  
through I2C commands.  
■ High reliability  
❐ Infinite read, write, and RECALL cycles  
❐ 1 million STORE cycles to QuantumTrap  
❐ Data retention: 20 years at 85 C  
■ High speed I2C interface  
❐ Industry standard 100 kHz and 400 kHz speed  
❐ Fast-mode Plus: 1 MHz speed  
❐ High speed: 3.4 MHz  
❐ Zero cycle delay reads and writes  
■ Write protection  
❐ Hardware protection using Write Protect (WP) pin  
❐ Software block protection for 1/4, 1/2, or entire array  
■ I2C access to special functions  
❐ Nonvolatile STORE/RECALL  
❐ 8 byte serial number  
❐ Manufacturer ID and Product ID  
❐ Sleep mode  
Configuration  
Feature  
AutoStore  
CY14MX064J1 CY14MX064J2 CY14MX064J3  
No  
Yes  
Yes  
Yes  
Yes  
Software  
STORE  
Yes  
■ Low power consumption  
Hardware  
STORE  
No  
No  
Yes  
❐ Average active current of 1 mA at 3.4 MHz operation  
❐ Average standby mode current of 150 µA  
❐ Sleep mode current of 8 µA  
Slave Address  
pins  
A2, A1, A0  
A2, A1  
A2, A1, A0  
Logic Block Diagram  
Serial Number  
8 x 8  
VCC VCAP  
Manufacture ID/  
Product ID  
Power Control  
Block  
Memory Control Register  
Command Register  
Quantrum Trap  
8 K x 8  
Sleep  
STORE  
SRAM  
8 K x 8  
Control Registers Slave  
Memory Slave  
SDA  
SCL  
A2, A1, A0  
WP  
I2C Control Logic  
Slave Address  
Decoder  
Memory  
Address and Data  
Control  
RECALL  
Note  
2
1. Serial (I C) nvSRAM is referred to as nvSRAM throughout the datasheet.  
Cypress Semiconductor Corporation  
Document #: 001- 65051 Rev. *B  
•
198 Champion Court  
•
San Jose, CA 95134-1709  
•
408-943-2600  
Revised May 6, 2011  
[+] Feedback  
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中文翻译

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