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CY14E064L-SZ25CT PDF预览

CY14E064L-SZ25CT

更新时间: 2024-11-06 13:07:11
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 内存集成电路静态存储器光电二极管
页数 文件大小 规格书
17页 522K
描述
Non-Volatile SRAM, 8KX8, 25ns, CMOS, PDSO28, 0.350 INCH, ROHS COMPLIANT, SOIC-28

CY14E064L-SZ25CT 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:28
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.26
Is Samacsys:N最长访问时间:25 ns
JESD-30 代码:R-PDSO-G28JESD-609代码:e4
内存密度:65536 bit内存集成电路类型:NON-VOLATILE SRAM
内存宽度:8湿度敏感等级:3
功能数量:1端子数量:28
字数:8192 words字数代码:8000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:8KX8
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL峰值回流温度(摄氏度):260
认证状态:Not Qualified最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子位置:DUAL
处于峰值回流温度下的最长时间:20Base Number Matches:1

CY14E064L-SZ25CT 数据手册

 浏览型号CY14E064L-SZ25CT的Datasheet PDF文件第2页浏览型号CY14E064L-SZ25CT的Datasheet PDF文件第3页浏览型号CY14E064L-SZ25CT的Datasheet PDF文件第4页浏览型号CY14E064L-SZ25CT的Datasheet PDF文件第5页浏览型号CY14E064L-SZ25CT的Datasheet PDF文件第6页浏览型号CY14E064L-SZ25CT的Datasheet PDF文件第7页 
CY14E064L  
64 Kbit (8K x 8) nvSRAM  
Features  
Functional Description  
25 ns and 45 ns access times  
The Cypress CY14E064L is a fast static RAM with a  
non-volatile element in each memory cell. The embedded  
non-volatile elements incorporate QuantumTrap technology  
producing the world’s most reliable non-volatile memory. The  
SRAM provides unlimited read and write cycles, while  
independent, non-volatile data resides in the highly reliable  
QuantumTrap cell. Data transfers from the SRAM to the  
non-volatile elements (the STORE operation) takes place  
automatically at power down. On power up, data is restored to  
the SRAM (the RECALL operation) from the non-volatile  
memory. Both the STORE and RECALL operations are also  
available under software control. A hardware STORE is  
initiated with the HSB pin.  
Hands off automatic STORE on power down with external  
68 mF capacitor  
STORE to QuantumTrap® non-volatile elements is initiated  
by software, hardware or AutoStore on power down  
RECALL to SRAM initiated by software or power up  
Unlimited READ, WRITE and RECALL cycles  
10 mA typical ICC at 200 ns cycle time  
1,000,000 STORE cycles to QuantumTrap  
100 year data retention to QuantumTrap  
Single 5V operation +10%  
Commercial temperature  
SOIC package  
RoHS compliance  
Logic Block Diagram  
V
CC  
V
CAP  
Quantum Trap  
128 X 512  
A5  
A6  
POWER  
CONTROL  
STORE  
A7  
RECALL  
STORE/  
RECALL  
CONTROL  
STATIC RAM  
ARRAY  
128 X 512  
A8  
HSB  
A9  
A11  
A12  
SOFTWARE  
DETECT  
A0  
-
A12  
DQ0  
COLUMN I/O  
DQ1  
DQ2  
DQ3  
COLUMN DEC  
DQ4  
DQ5  
DQ6  
DQ7  
A0  
A4  
A10  
A1  
A3  
A2  
OE  
CE  
WE  
Cypress Semiconductor Corporation  
Document Number: 001-06543 Rev. *D  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised August 7, 2007  
[+] Feedback  

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