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CY14B108M-ZSP20XI PDF预览

CY14B108M-ZSP20XI

更新时间: 2024-11-09 06:51:31
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 存储内存集成电路静态存储器光电二极管时钟
页数 文件大小 规格书
29页 1333K
描述
8 Mbit (1024K x 8/512K x 16) nvSRAM with Real Time Clock

CY14B108M-ZSP20XI 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:TSOP2包装说明:TSOP2, TSOP54,.46,32
针数:54Reach Compliance Code:compliant
ECCN代码:3A991.B.2.AHTS代码:8542.32.00.41
风险等级:5.78Is Samacsys:N
最长访问时间:20 nsJESD-30 代码:R-PDSO-G54
长度:22.415 mm内存密度:8388608 bit
内存集成电路类型:NON-VOLATILE SRAM内存宽度:16
功能数量:1端子数量:54
字数:524288 words字数代码:512000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:512KX16
封装主体材料:PLASTIC/EPOXY封装代码:TSOP2
封装等效代码:TSOP54,.46,32封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
峰值回流温度(摄氏度):260电源:3/3.3 V
认证状态:Not Qualified座面最大高度:1.2 mm
最大待机电流:0.01 A子类别:SRAMs
最大压摆率:0.075 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.8 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10.16 mm
Base Number Matches:1

CY14B108M-ZSP20XI 数据手册

 浏览型号CY14B108M-ZSP20XI的Datasheet PDF文件第2页浏览型号CY14B108M-ZSP20XI的Datasheet PDF文件第3页浏览型号CY14B108M-ZSP20XI的Datasheet PDF文件第4页浏览型号CY14B108M-ZSP20XI的Datasheet PDF文件第5页浏览型号CY14B108M-ZSP20XI的Datasheet PDF文件第6页浏览型号CY14B108M-ZSP20XI的Datasheet PDF文件第7页 
CY14B108K, CY14B108M  
8Mbit(1024Kx8/512Kx16)nvSRAMwith  
Real Time Clock  
Watchdog Timer  
Features  
Clock Alarm with Programmable Interrupts  
Capacitor or Battery Backup for RTC  
20 ns, 25 ns, and 45 ns Access Times  
Internally Organized as 1024K x 8 (CY14B108K) or 512K x 16  
(CY14B108M)  
Commercial and Industrial Temperatures  
44 and 54-pin TSOP II Package  
Pb-free and RoHS Compliance  
Hands Off Automatic STORE on Power Down with only a Small  
Capacitor  
STORE to QuantumTrap Nonvolatile Elements is Initiated by  
Software, Device Pin, or AutoStore on Power Down  
Functional Description  
RECALL to SRAM Initiated by Software or Power Up  
High Reliability  
The Cypress CY14B108K/CY14B108M combines a 8-Mbit  
nonvolatile static RAM with a full featured RTC in a monolithic  
integrated circuit. The embedded nonvolatile elements incor-  
porate QuantumTrap technology producing the world’s most  
reliable nonvolatile memory. The SRAM is read and written  
infinite number of times, while independent nonvolatile data  
resides in the nonvolatile elements.  
Infinite Read, Write, and RECALL Cycles  
200,000 STORE Cycles to QuantumTrap  
20 year Data Retention  
The RTC function provides an accurate clock with leap year  
tracking and a programmable, high accuracy oscillator. The  
alarm function is programmable for periodic minutes, hours,  
days, or months alarms. There is also a programmable watchdog  
timer for process control.  
Single 3V +20%, –10% Operation  
Data Integrity of Cypress nvSRAM Combined with Full  
Featured Real Time Clock (RTC)  
Logic Block Diagram[1, 2, 3]  
VCAP  
Quatrum  
VCC  
Trap  
2048 X 2048 X 2  
VRTCbat  
VRTCcap  
A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
A17  
POWER  
CONTROL  
R
O
W
STORE  
RECALL  
STORE/RECALL  
CONTROL  
D
E
C
O
D
E
R
HSB  
STATIC RAM  
ARRAY  
2048 X 2048 X 2  
SOFTWARE  
DETECT  
A14 - A2  
A18  
A19  
DQ0  
DQ1  
DQ2  
Xout  
Xin  
DQ3  
RTC  
DQ4  
DQ5  
DQ6  
I
INT  
N
P
U
T
B
U
F
F
E
R
S
DQ7  
COLUMN I/O  
MUX  
A19- A0  
DQ8  
DQ9  
DQ10  
OE  
COLUMN DEC  
WE  
DQ11  
DQ12  
DQ13  
DQ14  
CE  
BLE  
A9 A10  
A
11 A12 A13 A14 A15 A16  
DQ15  
BHE  
Notes  
1. Address A - A for x8 configuration and Address A - A for x16 configuration.  
0
19  
0
18  
2. Data DQ - DQ for x8 configuration and Data DQ - DQ for x16 configuration.  
0
7
0
15  
3. BHE and BLE are applicable for x16 configuration only.  
Cypress Semiconductor Corporation  
Document #: 001-47378 Rev. *B  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised July 30, 2009  
[+] Feedback  

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