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CY14B104L-BA20XCT PDF预览

CY14B104L-BA20XCT

更新时间: 2024-11-19 06:51:31
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器
页数 文件大小 规格书
25页 778K
描述
4 Mbit (512K x 8/256K x 16) nvSRAM

CY14B104L-BA20XCT 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:BGA包装说明:6 X 10 MM, 1.20 MM HEIGHT, ROHS COMPLIANT, FBGA-48
针数:48Reach Compliance Code:unknown
ECCN代码:3A991.B.2.AHTS代码:8542.32.00.41
风险等级:5.6最长访问时间:20 ns
JESD-30 代码:R-PBGA-B48JESD-609代码:e1
长度:10 mm内存密度:4194304 bit
内存集成电路类型:NON-VOLATILE SRAM内存宽度:8
湿度敏感等级:3功能数量:1
端子数量:48字数:524288 words
字数代码:512000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:512KX8封装主体材料:PLASTIC/EPOXY
封装代码:TFBGA封装等效代码:BGA48,6X8,30
封装形状:RECTANGULAR封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):260
电源:3/3.3 V认证状态:Not Qualified
座面最大高度:1.2 mm最大待机电流:0.005 A
子类别:SRAMs最大压摆率:0.065 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Silver/Copper (Sn/Ag/Cu)端子形式:BALL
端子节距:0.75 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:20宽度:6 mm

CY14B104L-BA20XCT 数据手册

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CY14B104L, CY14B104N  
4 Mbit (512K x 8/256K x 16) nvSRAM  
Features  
Functional Description  
20 ns, 25 ns, and 45 ns Access Times  
The Cypress CY14B104L/CY14B104N is a fast static RAM, with  
a nonvolatile element in each memory cell. The memory is  
Internally organized as 512K x 8 (CY14B104L) or 256K x 16  
(CY14B104N)  
organized as 512K bytes of 8 bits each or 256K words of 16 bits  
each. The embedded nonvolatile elements incorporate  
QuantumTrap technology, producing the world’s most reliable  
nonvolatile memory. The SRAM provides infinite read and write  
cycles, while independent nonvolatile data resides in the highly  
reliable QuantumTrap cell. Data transfers from the SRAM to the  
nonvolatile elements (the STORE operation) takes place  
automatically at power down. On power up, data is restored to  
the SRAM (the RECALL operation) from the nonvolatile memory.  
Both the STORE and RECALL operations are also available  
under software control.  
Hands off Automatic STORE on power down with only a small  
Capacitor  
STORE to QuantumTrap® nonvolatile elements initiated by  
software, device pin, or AutoStore® on power down  
RECALL to SRAM initiated by software or power up  
Infinite Read, Write, and Recall Cycles  
200,000 STORE cycles to QuantumTrap  
20 year data retention  
Single 3V +20% to –10% operation  
Commercial and Industrial Temperatures  
48-ball FBGA and 44/54-pin TSOP II packages  
Pb-free and RoHS compliance  
Logic Block Diagram[1, 2, 3]  
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Notes  
1. Address A - A for x8 configuration and Address A - A for x16 configuration.  
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2. Data DQ - DQ for x8 configuration and Data DQ - DQ for x16 configuration.  
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3. BHE and BLE are applicable for x16 configuration only.  
Cypress Semiconductor Corporation  
Document #: 001-07102 Rev. *L  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised December 19, 2008  
[+] Feedback  

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