Datasheet > CY14B104LA-ZS45XIT

CY14B104LA-ZS45XIT

更新时间： 2024-09-25 11:11:35

品牌	Logo	应用领域
英飞凌 - INFINEON		静态存储器光电二极管内存集成电路
页数	文件大小	规格书
28页	910K
描述
nvSRAM (non-volatile SRAM)

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中文翻译

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CY14B104LA

CY14B104NA

4-Mbit (512K × 8/256K × 16) nvSRAM

4-Mbit (512K

× 8/256K × 16) nvSRAM

■ Packages

Features

❐ 44-/54-pin thin small outline package (TSOP) Type II

❐ 48-ball fine-pitch ball grid array (FBGA)

■ 20 ns, 25 ns, and 45 ns access times

■ Internally organized as 512K × 8 (CY14B104LA) or 256K × 16

(CY14B104NA)

■ Pb-free and restriction of hazardous substances (RoHS)

compliant

■ Hands off automatic STORE on power-down with only a small

capacitor

Functional Description

The Cypress CY14B104LA/CY14B104NA is a fast static RAM

(SRAM), with a non-volatile element in each memory cell. The

memory is organized as 512K bytes of 8 bits each or 256K words

of 16-bits each. The embedded non-volatile elements incor-

porate QuantumTrap technology, producing the world’s most

reliable non-volatile memory. The SRAM provides infinite read

and write cycles, while independent non-volatile data resides in

the highly reliable QuantumTrap cell. Data transfers from the

SRAM to the non-volatile elements (the STORE operation) takes

place automatically at power-down. On power-up, data is

restored to the SRAM (the RECALL operation) from the

non-volatile memory. Both the STORE and RECALL operations

are also available under software control.

■ STORE to QuantumTrap non-volatile elements initiated by

software, device pin, or AutoStore on power-down

■ RECALL to SRAM initiated by software or power-up

■ Infinite read, write, and recall cycles

■ 1 million STORE cycles to QuantumTrap

■ 20 year data retention

■ Single 3 V +20, –10 operation

■ Industrial temperature

For a complete list of related documentation, click here.

Logic Block Diagram ^{[1, 2, 3]}

V_CC

V_CAP

Quatrum Trap

2048 X 2048

A₀

A₁

A₂

A₃

A₄

A₅

A₆

POWER

CONTROL

STORE

RECALL

STORE/RECALL

CONTROL

HSB

STATIC RAM

ARRAY

2048 X 2048

A₇

A₈

A₁₇

SOFTWARE

DETECT

A₁₄- A₂

A₁₈

DQ₀

DQ₁

DQ₂

DQ₃

DQ₄

DQ₅

DQ₆

DQ₇

COLUMN I/O

DQ₈

DQ₉

DQ₁₀

COLUMN DEC

DQ₁₁

DQ₁₂

DQ₁₃

DQ₁₄

BLE

A₁₁

A₉A₁₀

A₁₂A₁₃A₁₄A₁₅A₁₆

DQ₁₅

BHE

Notes

1. Address A –A for × 8 configuration and Address A –A for × 16 configuration.

2. Data DQ –DQ for × 8 configuration and Data DQ –DQ for × 16 configuration.

3. BHE and BLE are applicable for × 16 configuration only.

Cypress Semiconductor Corporation

Document Number: 001-49918 Rev. *O

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised May 12, 2017

12 3 4 5 6 7...28

中文翻译

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与CY14B104LA-ZS45XIT相关器件

型号	品牌	获取价格	描述	数据表
CY14B104LA-ZSP20XI	CYPRESS	获取价格	Non-Volatile SRAM, 512KX8, 20ns, CMOS, PDSO54, ROHS COMPLIANT, TSOP2-54
CY14B104LA-ZSP20XIT	CYPRESS	获取价格	Non-Volatile SRAM, 512KX8, 20ns, CMOS, PDSO54, ROHS COMPLIANT, TSOP2-54
CY14B104LA-ZSP25XCT	CYPRESS	获取价格	Non-Volatile SRAM, 512KX8, 25ns, CMOS, PDSO54, ROHS COMPLIANT, TSOP2-54
CY14B104LA-ZSP25XI	CYPRESS	获取价格	Non-Volatile SRAM, 512KX8, 25ns, CMOS, PDSO54, ROHS COMPLIANT, TSOP2-54
CY14B104LA-ZSP25XIT	CYPRESS	获取价格	Non-Volatile SRAM, 512KX8, 25ns, CMOS, PDSO54, ROHS COMPLIANT, TSOP2-54
CY14B104LA-ZSP45XCT	CYPRESS	获取价格	Non-Volatile SRAM, 512KX8, 45ns, CMOS, PDSO54, ROHS COMPLIANT, TSOP2-54
CY14B104LA-ZSP45XI	CYPRESS	获取价格	Non-Volatile SRAM, 512KX8, 45ns, CMOS, PDSO54, ROHS COMPLIANT, TSOP2-54
CY14B104LA-ZSP45XIT	CYPRESS	获取价格	Non-Volatile SRAM, 512KX8, 45ns, CMOS, PDSO54, ROHS COMPLIANT, TSOP2-54
CY14B104L-BA15XCT	CYPRESS	获取价格	4-Mbit (512K x 8/256K x 16) nvSRAM
CY14B104L-BA15XI	CYPRESS	获取价格	4-Mbit (512K x 8/256K x 16) nvSRAM

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