PRELIMINARY
CY14B104K/CY14B104M
4 Mbit (512K x 8/256K x 16) nvSRAM with
Real-Time-Clock
■ Watchdog timer
Features
■ Clock alarm with programmable interrupts
■ Capacitor or battery backup for RTC
■ 15 ns, 20 ns, 25 ns, and 45 ns access times
■ Internally organized as 512K x 8 (CY14B104K) or 256K x 16
(CY14B104M)
■ Commercial and industrial temperatures
■ 44/54-pin TSOP II package
■ Hands off automatic STORE on power down with only a small
capacitor
■ Pb-free and RoHS compliance
■ STORE to QuantumTrap® nonvolatile elements is initiated by
software, device pin, or AutoStore® on power down
Functional Description
■ RECALL to SRAM initiated by software or power up
■ High reliability
The Cypress CY14B104K/CY14B104M combines a 4-Mbit
nonvolatile static RAM with a full featured real-time-clock in a
monolithic integrated circuit. The embedded nonvolatile
elements incorporate QuantumTrap technology producing the
world’s most reliable nonvolatile memory. The SRAM is read and
written an infinite number of times, while independent nonvolatile
data resides in the nonvolatile elements.
■ Infinite read, write, and recall cycles
■ 200,000 STORE cycles to QuantumTrap
■ 20 year data retention
The real-time-clock function provides an accurate clock with leap
year tracking and a programmable, high accuracy oscillator. The
alarm function is programmable for one time alarms or periodic
seconds, minutes, hours, or days. There is also a programmable
watchdog timer for process control.
■ Single 3V +20%, –10% operation
■ Data integrity of Cypress nvSRAM combined with full featured
Real-Time-Clock
Logic Block Diagram
VCC
VRTCcap
VRTCbat
VCAP
[1]
[1]
A0 - A18
Address
DQ0 - DQ7
CE
OE
HSB
CY14B104K
CY14B104M
INT
X1
WE
BHE
BLE
X2
VSS
Note
1. Address A - A and DQ0 - DQ7 for x8 configuration, Address A - A and Data DQ0 - DQ15 for x16 configuration.
0
18
0
17
Cypress Semiconductor Corporation
Document #: 001-07103 Rev. *I
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised June 20, 2008
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