CY14B101KA
CY14B101MA
1-Mbit (128K × 8/64K × 16) nvSRAM with
Real Time Clock
1-Mbit (128K
× 8/64K × 16) nvSRAM with Real Time Clock
■ Industry standard configurations
❐ Single 3 V +20%, –10% operation
❐ Industrial temperature
Features
■ 1-Mbit nonvolatile static random access memory (nvSRAM)
❐ 25 ns and 45 ns access times
❐ Internally organized as 128K × 8 (CY14B101KA) or 64K × 16
(CY14B101MA)
❐ HandsoffautomaticSTOREonpower-downwithonlyasmall
capacitor
❐ STORE to QuantumTrap nonvolatile elements is initiated by
software, hardware, or AutoStore on power-down
■ Packages
❐ 44-/54-pin thin small outline package (TSOP) Type II
❐ 48-pin shrink small outline package (SSOP)
■ Pb-free and restriction of hazardous substances (RoHS)
compliant
❐ RECALL to SRAM initiated on power-up or by software
Functional Description
■ High reliability
The Cypress CY14B101KA/CY14B101MA combines a 1-Mbit
nvSRAM with a full featured real time clock in a monolithic
integrated circuit. The embedded nonvolatile elements
incorporate QuantumTrap technology producing the world’s
most reliable nonvolatile memory. The SRAM is read and written
an infinite number of times, while independent nonvolatile data
resides in the nonvolatile elements.
❐ Infinite Read, Write, and RECALL cycles
❐ 1 million STORE cycles to QuantumTrap
❐ 20 year data retention
■ Real time clock (RTC)
❐ Full featured real time clock
❐ Watchdog timer
❐ Clock alarm with programmable interrupts
❐ Capacitor or battery backup for RTC
❐ Backup current of 0.35 µA (Typ)
The real time clock function provides an accurate clock with leap
year tracking and a programmable, high accuracy oscillator. The
alarm function is programmable for periodic minutes, hours,
days, or months alarms. There is also a programmable watchdog
timer for process control.
For a complete list of related documentation, click here.
Logic Block Diagram[1, 2, 3]
VCA
VCC
Quatrum
Trap
P
1024 X 1024
VRTCbat
VRTCcap
POWER
CONTROL
R
O
W
A5
A6
A7
STORE
RECALL
A8
A9
A12
A13
A14
A15
A16
STORE/RECALL
CONTROL
D
E
C
O
D
E
R
HSB
STATIC RAM
ARRAY
1024 X 1024
SOFTWARE
DETECT
A14 - A2
DQ0
DQ1
DQ2
Xout
Xin
DQ3
RTC
DQ4
DQ5
DQ6
I
INT
N
P
U
T
B
U
F
F
E
R
S
DQ7
COLUMN I/O
MUX
A16- A0
DQ8
DQ9
DQ10
OE
COLUMN DEC
WE
DQ11
DQ12
DQ13
DQ14
CE
BLE
A0 A1 A2 A3 A4 A10 A11
DQ15
BHE
Notes
1. Address A –A for × 8 configuration and Address A –A for × 16 configuration.
0
16
0
15
2. Data DQ –DQ for × 8 configuration and Data DQ –DQ for × 16 configuration.
0
7
0
15
3. BHE and BLE are applicable for × 16 configuration only.
Cypress Semiconductor Corporation
Document Number: 001-42880 Rev. *P
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised December 6, 2017