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CXK5T16100TM-12LLX PDF预览

CXK5T16100TM-12LLX

更新时间: 2024-11-30 22:08:23
品牌 Logo 应用领域
索尼 - SONY /
页数 文件大小 规格书
10页 140K
描述
65536-word x 16-bit High Speed CMOS Static RAM

CXK5T16100TM-12LLX 技术参数

生命周期:Obsolete零件包装代码:TSOP2
包装说明:TSOP2, TSOP44,.46,32针数:44
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.82
最长访问时间:120 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-G44长度:18.41 mm
内存密度:1048576 bit内存集成电路类型:STANDARD SRAM
内存宽度:16功能数量:1
端子数量:44字数:65536 words
字数代码:64000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-25 °C
组织:64KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSOP2
封装等效代码:TSOP44,.46,32封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
电源:3/3.3 V认证状态:Not Qualified
座面最大高度:1.2 mm最大待机电流:0.000028 A
最小待机电流:2 V子类别:SRAMs
最大压摆率:0.05 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子形式:GULL WING
端子节距:0.8 mm端子位置:DUAL
宽度:10.16 mmBase Number Matches:1

CXK5T16100TM-12LLX 数据手册

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CXK5T16100TM-12LLX  
Preliminary  
65536-word × 16-bit High Speed CMOS Static RAM  
For the availability of this product, please contact the sales office.  
Description  
44 pin TSOP (PIastic)  
The CXK5T16100TM is a general purpose high  
speed CMOS static RAM organized as 65536-  
words by 16-bits.  
Special feature are low power consumption and  
high speed.  
The CXK5T16100TM is a suitable RAM for portable  
equipment with battery back up.  
Features  
Block Diagram  
Extended operating temperature range: –25 to +85°C  
Wide supply voltage range operation: 2.7 to 3.6V  
A1  
A0  
A7  
A6  
A5  
A4  
A3  
Fast access time:  
3.0V operation  
3.3V operation  
(Access time)  
120ns (max.)  
100ns (max.)  
Buffer  
Vcc  
Vcc  
Memory  
Row  
Memory  
Matrix  
512 × 1024  
Low power consumption operation:  
Standby / DC operation  
Matrix  
Decoder  
A2  
512 × 1024  
GND  
A15  
A14  
GND  
1.6µW (typ.) / 3.3mW (typ.)  
100µW (max.) / 11mW (max.)  
CE  
UB  
Fully static memory ··· No clock or timing strobe  
required  
Control  
LB  
OE  
WE  
I/O Gate  
Pre  
I/O Gate  
Column  
Decoder  
Column  
Decoder  
Decoder  
Equal access and cycle time  
A13  
A12  
A11  
A10  
A9  
Common data input and output: three state output  
Directly LVTTL compatible: All inputs and outputs  
Low voltage data retention: 2.0V (min.)  
400mil 44pin TSOP (type II) package  
Buffer  
I/O Buffer  
I/O1 I/O8  
I/O Buffer  
A8  
I/O9 I/O16  
Function  
65536-word x 16-bit static RAM  
Structure  
Silicon gate CMOS IC  
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by  
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the  
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.  
– 1 –  
PE96405-ST  

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