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CXK58512M-55LL PDF预览

CXK58512M-55LL

更新时间: 2024-11-26 22:08:55
品牌 Logo 应用领域
索尼 - SONY 存储内存集成电路静态存储器光电二极管
页数 文件大小 规格书
12页 212K
描述
65536-word X 8-bit High Speed CMOS Static RAM

CXK58512M-55LL 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP32,.56针数:32
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.84
Is Samacsys:N最长访问时间:55 ns
I/O 类型:COMMONJESD-30 代码:R-PDSO-G32
长度:20.5 mm内存密度:524288 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1端子数量:32
字数:65536 words字数代码:64000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:64KX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP32,.56
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL电源:5 V
认证状态:Not Qualified座面最大高度:3.05 mm
最大待机电流:0.000006 A最小待机电流:2 V
子类别:SRAMs最大压摆率:0.09 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:11.2 mm
Base Number Matches:1

CXK58512M-55LL 数据手册

 浏览型号CXK58512M-55LL的Datasheet PDF文件第2页浏览型号CXK58512M-55LL的Datasheet PDF文件第3页浏览型号CXK58512M-55LL的Datasheet PDF文件第4页浏览型号CXK58512M-55LL的Datasheet PDF文件第5页浏览型号CXK58512M-55LL的Datasheet PDF文件第6页浏览型号CXK58512M-55LL的Datasheet PDF文件第7页 
CXK58512TM/M-55LL/70LL/10LL  
65536-word × 8-bit High Speed CMOS Static RAM  
For the availability of this product, please contact the sales office.  
Under development  
Description  
CXK58512TM  
CXK58512M  
The CXK58512TM/M is a high speed CMOS static  
RAM organized as 65536-words by 8 bits.  
A polysilicon TFT cell technology realized extremely  
low stand-by current and higher data retention  
stability.  
32 pin TSOP (Plastic)  
32 pin SOP (Plastic)  
Special feature are low power consumption, high  
speed.  
The CXK58512TM/M is a suitable RAM for portable  
equipment with battery back up.  
Block Diagram  
Features  
A15  
A13  
A8  
A11  
A9  
Fast access time  
-55LL  
(Access time)  
55ns (Max.)  
70ns (Max.)  
100ns (Max.)  
10µA (Max.)  
6µA (Max.)  
VCC  
Memory  
Matrix  
Row  
Decoder  
Buffer  
A7  
-70LL  
A6  
A5  
A14  
A12  
GND  
1024 × 512  
-10LL  
Low standby current  
Low data retention current  
Single +5V supply: +5V ± 10%  
A4  
A3  
A10  
A0  
A2  
A1  
Low voltage data retention: 2.0V (Min.)  
Broad package line-up  
I/O Gate  
Column  
Decoder  
Buffer  
CXK58512TM 8mm × 20mm 32 pin TSOP package  
CXK58512M  
525mil 32 pin SOP Package  
OE  
Function  
Buffer  
65536-word × 8 bit static RAM  
WE  
I/O Buffer  
CE1  
CE2  
Structure  
I/O1  
I/O8  
Silicon gate CMOS IC  
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by  
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the  
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.  
– 1 –  
E94915A58-PK  

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