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CXD2597Q PDF预览

CXD2597Q

更新时间: 2022-12-01 17:16:52
品牌 Logo 应用领域
索尼 - SONY 数字信号处理器
页数 文件大小 规格书
115页 870K
描述
CD Digital Signal Processor with Built-in Digital Servo and DAC

CXD2597Q 数据手册

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CXD2597Q  
CD Digital Signal Processor with Built-in Digital Servo and DAC  
For the availability of this product, please contact the sales office.  
Description  
The CXD2597Q is a digital signal processor LSI for  
CD players. This LSI incorporates a digital servo,  
digital filter, zero detection circuit, 1-bit DAC and  
analog low-pass filter on a single chip.  
80 pin QFP (Plastic)  
Features  
Digital Signal Processor (DSP) Block  
Playback mode supporting CAV (Constant Angular  
Velocity)  
Frame jitter free  
0.5× to 4× continuous playback possible  
Allows relative rotational velocity readout  
• Wide capture range playback mode  
Spindle rotational velocity following method  
Supports normal-speed to 4× speed playback  
16K RAM  
Applications  
CD players  
Structure  
Silicon gate CMOS IC  
EFM data demodulation  
Absolute Maximum Ratings  
Enhanced EFM frame sync signal protection  
SEC strategy-based error correction  
Subcode demodulation and Sub Q data error  
detection  
Digital spindle servo  
16-bit traverse counter  
Asymmetry correction circuit  
CPU interface on serial bus  
Error correction monitor signal, etc. output from a  
new CPU interface  
Supply voltage  
Input voltage  
VDD  
VI  
–0.3 to +7.0  
–0.3 to +7.0  
V
V
(VSS – 0.3V to VDD + 0.3)  
–0.3 to +7.0  
–40 to +125 °C  
Output voltage  
Storage temperature Tstg  
Supply voltage difference  
VO  
V
VSS – AVSS –0.3 to +0.3  
VDD – AVDD –0.3 to +0.3  
Note) AVDD includes XVDD and AVSS includes XVSS.  
V
V
Servo auto sequencer  
Recommended Operating Conditions  
Digital audio interface outputs  
Digital level meter, peak meter  
CD TEXT data demodulation  
Supply voltage  
VDD  
+2.7 to +5.5  
V
Operating temperature Topr  
–20 to +75 °C  
Note) The VDD for the CXD2597Q varies according to  
the playback speed selection.  
Digital Servo (DSSP) Block  
Microcomputer software-based flexible servo control  
Offset cancel function for servo error signal  
Auto gain control function for servo loop  
E:F balance, focus bias adjustment functions  
VDD [V]  
Playback  
speed  
CD-DSP block  
4.75 to 5.25  
3.0 to 5.5  
DAC block  
4×  
2×  
1×  
Digital Filter, DAC and Analog Low-Pass Filter Blocks  
DBB (digital bass boost) function  
Double-speed playback supported  
Digital de-emphasis  
4.5 to 5.5  
2.7 to 5.5  
2.7 to 5.5  
Digital attenuation  
Zero detection function  
8Fs oversampling digital filter  
I/O Capacitance  
Input capacitance CI  
Output capacitance CO  
11 (Max.)  
11 (Max.)  
11 (Max.)  
pF  
pF  
pF  
S/N: 100dB or more (master clock: 384Fs, typ.)  
Logical value: 109dB  
I/O capacitance  
CI/O  
THD + N: 0.007% or less (master clock: 384Fs, typ.)  
Rejection band attenuation: –60dB or less  
Note) Measurement conditions VDD = VI = 0V  
fM = 1MHz  
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by  
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the  
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.  
– 1 –  
E97Z35-PS  

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