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CXA2016S PDF预览

CXA2016S

更新时间: 2024-01-22 02:38:43
品牌 Logo 应用领域
索尼 - SONY 显示器
页数 文件大小 规格书
12页 185K
描述
Sync Identification for CRT Display

CXA2016S 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:SDIP, SDIP22,.3
针数:22Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.88
商用集成电路类型:CONSUMER CIRCUITJESD-30 代码:R-PDIP-T22
JESD-609代码:e0长度:19.2 mm
功能数量:1端子数量:22
最高工作温度:75 °C最低工作温度:-20 °C
封装主体材料:PLASTIC/EPOXY封装代码:SDIP
封装等效代码:SDIP22,.3封装形状:RECTANGULAR
封装形式:IN-LINE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
座面最大高度:4.3 mm子类别:Other Consumer ICs
最大压摆率:45 mA最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V表面贴装:NO
技术:BIPOLAR温度等级:COMMERCIAL EXTENDED
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:1.778 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

CXA2016S 数据手册

 浏览型号CXA2016S的Datasheet PDF文件第2页浏览型号CXA2016S的Datasheet PDF文件第3页浏览型号CXA2016S的Datasheet PDF文件第4页浏览型号CXA2016S的Datasheet PDF文件第5页浏览型号CXA2016S的Datasheet PDF文件第6页浏览型号CXA2016S的Datasheet PDF文件第7页 
CXA2016S  
Sync Identification for CRT Display  
Description  
22 pin SDIP (Plastic)  
The CXA2016S is used for sync signal  
identification and waveform shaping in the CRT  
computers display for multi-scan system. There are  
three types of sync input signals for identification:  
separate sync, composite sync, and sync on video  
signals.  
Features  
Power save function available (5 V power supply)  
Clamp pulse output position selectable among sync  
interval, back porch interval, and AUTO.  
Polarity information of sync signals is output.  
Polarity and amplitude of input signals:  
Absolute Maximum Ratings (Ta=25°C)  
Supply voltage  
VCC  
12  
V
Operating temperature  
Storage temperature  
Allowable power dissipation  
Topr –20 to +75 °C  
Tstg –65 to +150 °C  
Polarity  
V. separate sync: Positive/Negative  
H. separate sync: Positive/Negative  
Composite sync: Positive/Negative  
Sync on video:  
Amplitude (Vp-p)  
1 to 5  
PD  
962  
mW  
V
1 to 5  
Operating Conditions  
1 to 5  
Supply voltage  
VCC  
5 ± 0.25  
Sync signals part of Negative  
Video part  
0.2 to 0.4  
0 to 1.4  
Applications  
CRT display monitor  
Pin Configuration (Top View)  
Block Diagram  
PVC  
2
EVC  
3
1
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
12  
VS IN  
PVC  
VCC  
VD  
2
3
4
Polarity  
Check  
V. Ramp  
Generator  
Exist  
Check  
1
21  
VD  
VS IN  
EVC  
VSS IN  
VSS OUT  
HD  
HD SEL  
8
17  
16  
PV  
PH  
CS IN  
PHC  
5
6
7
18  
9
HD  
Polarity  
Check  
Exist  
Check  
4
CS IN  
PHC  
Logic  
ISC  
EHC  
PV  
5
6
7
13  
14  
Clamp  
CLP OUT  
CLP OUT  
Video IN  
HD SEL  
ISC  
PH  
Pulse  
Generator  
EHC  
CLP SEL  
CLP OUT  
CLP OUT  
VSS REF  
8
9
Sync  
Sep  
Sync  
Check  
15  
Video IN  
CLP SEL  
Bias  
Level  
Control  
10  
11  
ISJ  
GND  
10  
19  
VSS OUT  
20  
12  
11  
22  
ISJ  
VSS IN VSS REF  
GND  
VCC  
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by  
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the  
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.  
—1—  
E95422B78-TE  

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