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CSPST16 PDF预览

CSPST16

更新时间: 2024-01-09 15:41:56
品牌 Logo 应用领域
CALMIRCO /
页数 文件大小 规格书
4页 55K
描述
CHIP SCALE SERIES TERMINATION ARRAY

CSPST16 数据手册

 浏览型号CSPST16的Datasheet PDF文件第2页浏览型号CSPST16的Datasheet PDF文件第3页浏览型号CSPST16的Datasheet PDF文件第4页 
CALIFORNIA MICRO DEVICES  
CSPST  
Chip Scale SeriesTermination Array  
Features  
Applications  
• 8 or 16 integrated high frequency series  
terminations  
• Series resistive bus termination  
• Isolated resistor array  
• Ultra small footprint Chip Scale Package  
• Ceramic substrate  
• 0.35mm Eutectic Solder Bumps, 0.65mm pitch  
Product Description  
The CSPST is a high performance Integrated Passive  
Device (IPD) which provides series terminations suitable  
for use in high speed bus applications. Eight (8) or  
sixteen (16) series termination versions are provided.  
These resistors provide excellent high frequency  
performance in excess of 3GHz and are manufactured to  
an absolute tolerance as low as 1ꢀ. The Chip Scale  
Package provides an ultra small footprint for this IPD  
and provides minimal parasitics compared to conven-  
tional packaging. Typical bump inductance is less than  
25pH. The large solder bumps and ceramic substrate  
allow for standard attachment to laminate printed circuit  
boards without the use of underfill.  
SCHEMATIC DIAGRAMS  
D
D
R1  
R1  
R1  
R1  
R1  
R1  
R1  
R1  
R1  
R1  
R1  
R1  
C
B
C
B
R1  
R1  
R1  
R1  
R1  
R1  
R1  
R1  
R1  
R1  
R1  
R1  
A
A
1
2
3
4
1
2
3
4
5
6
7
8
CSPST16  
CSPST08  
STANDARD VALUES  
Resistor Value  
R1 = 22Ω, 33Ω, 39Ω, 47Ω, 51Ω, 56Ω,  
Absolute Tolerance R  
TCR of Resistors  
1%, 5%  
100ppm  
Power Rating/Resistor  
Operating Temperature Range  
100mW  
40°C to 85°C  
© 2000 California Micro Devices Corp. All rights reserved.  
C1300700  
11/10/2000 215 Topaz Street, Milpitas, California 95035  
Tel: (408) 263-3214  
Fax: (408) 263-7846  
www.calmicro.com  
1

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