CS8413
CS8414
96 kHz Digital Audio Receiver
Features
Description
The CS8413 and CS8414 are monolithic CMOS devices
which receive and decode audio data up to 96kHz ac-
cording to the AES/EBU, IEC958, S/PDIF, and EIAJ
CP340/1201 interface standards. The CS8413 and
CS8414 receive data from a transmission line, recover
the clock and synchronization signals, and de-multiplex
the audio and digital data. Differential or single ended in-
puts can be decoded.
l Sample Rates to >100 kHz
l Low-Jitter, On-Chip Clock Recovery
256xFs Output clock Provided
l Supports: AES/EBU, IEC 958, S/PDIF, &
EIAJ CP340/1201 Professional and
Consumer Formats
l Extensive Error Reporting
Repeat Last Sample on Error Option
l On-Chip RS422 Line Receiver
l Configurable Buffer Memory (CS8413)
l Pin Compatible with CS8411 and CS8412
The CS8413 has a configurable internal buffer memory,
read through a parallel port, which may be used to buffer
channel status, auxiliary data, and/or user data.
The CS8414 de-multiplexes the channel, user, and va-
lidity data directly to serial output pins with dedicated
output pins for the most important channel status bits.
ORDERING INFORMATION
CS8413-CS 0° to 70° C
CS8414-CS 0° to 70° C
28-pin Plastic SOIC
28-pin Plastic SOIC
I
VD+ DGND
VA+
22
FILT AGND
20 21
MCK
19
CS8413
7
8
26
SDATA
12
Audio
Serial Port
SCK
11
9
FSYNC
RXP
RXN
13
RS422
Receiver
De-MUX
Clock and Data Recovery
A4/FCK
10
4
8
A3-A0
D7-D0
Configurable
Buffer
Memory
24
23
IEnable and Status
CS
RD/WR
25
ERF
14
INT
VD+ DGND
VA+
22
FILT AGND
20 21
MCK
19
M3 M2
17 18
M1 M0
24 23
CS8414
7
8
26
SDATA
12
Audio
SCK
9
Serial Port
Registers
11
RXP
RXN
FSYNC
RS422
De-MUX
Clock and Data Recovery
MUX
Receiver
1
10
C
14
U
VERF
28
MUX
13
16
6
5
4
3
2
27
25
15
CS12/
FCK
SEL
C0/ Ca/ Cb/ Cc/ Cd/ Ce/
E0 E1 E2 F0 F1 F2
ERF CBL
Cirrus Logic, Inc.
Copyright Cirrus Logic, Inc. 1998
(All Rights Reserved)
Crystal Semiconductor Products Division
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.crystal.com
OCT ‘98
DS240F1
1