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CS6403

更新时间： 2024-01-05 00:04:23
品牌 Logo 应用领域
凌云 - CIRRUS 解码器编解码器
页数 文件大小 规格书
54页 756K
描述
Echo-Cancelling Codec

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中文翻译

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CS6403 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：TQFP-44Reach Compliance Code：unknown
风险等级：5.89压伸定律：A/MU-LAW
滤波器：YESJESD-30 代码：S-PQFP-G44
JESD-609代码：e0线性编码：16-BIT
功能数量：1端子数量：44
工作模式：SYNCHRONOUS最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：QFP封装等效代码：QFP44,.47SQ,32
封装形状：SQUARE封装形式：FLATPACK
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
认证状态：Not Qualified子类别：Codecs
标称供电电压：5 V表面贴装：YES
技术：CMOS电信集成电路类型：PCM CODEC
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.8 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
Base Number Matches：1

CS6403 数据手册

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CS6403  
Echo-Cancelling Codec  
Features  
Description  
The CS6403 is an application-specific digital signal pro-  
cessor optimized for network and acoustic echo  
cancellation applications. A high-quality codec is inte-  
grated with the processor to provide a complete, low-  
cost echo-cancellation solution.  
Applicable in:  
- Digital-Cellular Hands-Free Phones  
- Analog-Cellular Hands-Free Phones  
- Office Speaker Phones  
- Desktop & Video Teleconferencing  
The CS6403 is a fully independent processor that re-  
quires no signal processing support to implement its  
cancellation functions. Volume control, AGC, and sleep  
functions are also provided.  
Echo Cancellation  
- Up to 60 dB ERLE  
- 512 Tap (64 ms at 8 kHz sampling rate)  
- Split Mode For Two Echo Cancellers  
Serial Data/Control Interface  
On-Chip Delta-Sigma Codec  
- < 1% THD, 8 Ω Load On Output  
- > 70 dB S/(N+D) on Input  
The on-chip ADC and DAC employ over-sampling tech-  
nology, which eliminates the need for complex external  
anti-aliasing and reconstruction filters, further reducing  
system cost.  
The CS6403 has a serial interface that is compatible with  
most DSPs and PCM codecs. Clock and sync lines con-  
trol the transfer of serial data via the separate serial data-  
in and data-out pins. Both 16-bit audio data and con-  
trol/status information may be multiplexed on this serial  
channel using a steering bit.  
- 300-3600 Hz Bandwidth (8 kHz sampling rate)  
- Volume Control  
- Microphone Preamp  
Automatic Gain Control (AGC)  
No Training Signals Generated  
ORDERING INFORMATION  
CS6403-IQ  
CS6403-IL  
CDB6403  
-40° to +85° C 44-pin TQFP  
-40° to +85° C 44-pin PLCC  
Evaluation Board  
I
DVDD0  
1
RESERVED0  
6
AVDD  
CONFIG  
GPIN0  
GPIN1  
GPIN2  
GPIN3  
RESET  
DSP  
Analog I/O  
PVDD  
SPKROUTP  
A
Nonlinear  
Echo  
A
G
C
Volume  
Control  
High  
Pass  
T
T
E
N
D/A  
Control  
SPKROUTN  
PGND0  
PGND1  
GPOUT0  
GPOUT1  
SFRAME  
SMASTER  
UALAW  
SSYNC  
Control  
Echo Cancellers  
Control  
Status  
A
T
T
E
N
26 dB  
Nonlinear  
Echo  
High  
Pass  
A/D  
MICIN  
Control  
SCLK  
SDO_1  
SDI_A  
SYNCOUT  
VCM  
VREF  
PLL + Clock Manager  
CLKIN CLKOUTSCLK_RATE0SCLK_RATE1CLK_SEL  
NC  
DGND0  
1
AGND0  
1
This document contains information for a new product.  
Cirrus Logic reserves the right to modify this product without notice.  
Preliminary Product Information  
Cirrus Logic, Inc.  
Copyright Cirrus Logic, Inc. 1997  
(All Rights Reserved)  
Crystal Semiconductor Products Division  
P.O. Box 17847, Austin, Texas 78760  
(512) 445 7222 FAX: (512) 445 7581  
http://www.crystal.com  
MAR ‘96  
DS192PP7  
1
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中文翻译

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