Datasheet > CS61310-IL

CS61310-IL

更新时间： 2024-10-29 22:28:47

品牌	Logo	应用领域
凌云 - CIRRUS		电信集成电路 PC
页数	文件大小	规格书
30页	494K
描述
T1 INE INTERFACE UNIT

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CS61310-IL 数据手册

CS61310

T1 Line Interface Unit

Features

Description

The CS61310 is a T1 primary rate line interface unit. It

combines the complete analog transmit-and-receive cir-

cuitry for a single, full-duplex interface at T1 rates. The

device is pin- and function-compatible with the Level

One LXT310.

Provides T1 line interface

No crystal needed for jitter attenuation

Greater than 14 dB of transmit return loss

Meets AT&T 62411 jitter tolerance and

attenuation requirements

Meets ANSI T1.231B requirements for LOS and

AIS

AWG for user programmable pulse shapes

TX driver high impedance / low power control

Generation and detection of loop up / loop down

signaling

Enhanced functionality is available through an extended

well as generation and detection of loop up and loop

down codes. The CS61310 features crystal-less jitter

attenuation.

Selectable unipolar or bipolar I/O

Compliant with:

— American National Standards (ANSI): T1.102, T1.105,

T1.403, T1.408, and T1.231

— FCC Rules and Regulations: Part 68 and Part 15

— AT&T Publication 62411

— TR-NET-00499

ORDERING INFORMATION

CS61310-IL

28-pin PLCC

TCLK

PULSE

TRANSMIT

TIMING &

CONTROL

SHAPING

CIRCUITRY

ROM / RAM

JITTER

ATTEN

TTIP

TDATA/TPOS

UBS/TNEG

LINE DRIVERS

TRING

CLKE/TAOS

CS/RLOOP

SCLK/LLOOP

SDI/LBO1

JASEL

SERIAL

PORT

TAOS Enable

LBO Select

LOCAL

REMOTE

LOOPBACK

(DIGITAL)

REGISTERS & CONTROL LOGIC

SDO/LBO2

LOOPBACK

LOS/

NLOOP

LLOOP

Enable

LOCAL

Clear

LOOPBACK

(ANALOG)

EQUALIZER

CONTROL

LATN

RCLK

RDATA/RPOS

BPV/RNEG

TIMING

JITTER

ATTEN

& DATA

RECOVERY

SLICERS

& PEAK

DETECT

NOISE &

CROSSTALK

FILTERS

RTIP

MAGNITUDE

EQUALIZER

AGC

RRING

RECEIVE

CLOCK

GENERATOR

INBAND

NLOOP

& LOS

INT/NLOOP

LOS

MCLK

PROCESSOR

TV+

XTALIN

XTALOUT

MODE RV+ RGND TGND

This document contains advanced information for a new product.

Cirrus Logic reserves the right to modify this product without notice.

Final Product Information

Cirrus Logic, Inc.

http://www.cirrus.com

DS440F1

FEB ‘03

12 3 4 5 6 7...30

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